MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 46

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.3
byte) automatically according to the number of bytes of an instruction to be fetched each time another instruction is
executed. When a branch instruction is executed, the branch destination information is set to the PC and branched by
the following addressing (for details of instructions, refer to 78K/0 Series Instructions User’s Manual (U12326E)).
3.3.1
44
An instruction address is determined by program counter (PC) contents and is normally incremented (+1 for each
[Function]
[Illustration]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched.
displacement value is treated as signed two’s complement data ( 128 to +127) and bit 7 becomes a sign bit.
In other words, relative addressing consists of relative branching from the start address of the following
instruction to the 128 to +127 range.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
Instruction Address Addressing
PC
Relative addressing
When S = 0, all bits of
When S = 1, all bits of
15
15
15
are 0.
are 1.
8
PC
+
CHAPTER 3 CPU ARCHITECTURE
7
S
User’s Manual U17890EJ2V0UD
6
jdisp8
0
0
0
...
PC indicates the start address
of the instruction after the BR instruction.
The

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