MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 138

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(3) Pulse width measurement with free-running counter and two capture registers
136
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
When 16-bit timer counter 00 (TM00) is operated in free-running mode, it is possible to measure the pulse width
of the signal input to the TI000 pin.
When the rising or falling edge specified by bits 4 and 5 (ES000 and ES001) of prescaler mode register 00
(PRM00) is input to the TI000 pin, the value of TM00 is taken into 16-bit timer capture/compare register 01
(CR01) and an interrupt request signal (INTTM01) is set.
Also, when the inverse edge to that of the capture operation is input into CR01, the value of TM00 is taken into
16-bit timer capture/compare register 00 (CR00).
Sampling is performed using the count clock cycle selected by prescaler mode register 00 (PRM00), and a
capture operation is only performed when a valid level of the TI000 pin is detected twice, thus eliminating noise
with a short pulse width.
Figure 7-22. Control Register Settings for Pulse Width Measurement with Free-Running Counter and
TMC00
CRC00
PRM00
See the description of the respective control registers for details.
ES101
0/1
7
0
7
0
ES100
0/1
6
0
6
0
Two Capture Registers (with Rising Edge Specified)
(a) 16-bit timer mode control register 00 (TMC00)
(b) Capture/compare control register 00 (CRC00)
ES001
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
5
0
5
0
0
(c) Prescaler mode register 00 (PRM00)
ES000
4
0
4
0
1
User’s Manual U17890EJ2V0UD
TMC003
0
3
0
3
0
TMC002
CRC002
1
1
2
0
TMC001
CRC001
PRM001
0/1
0/1
1
OVF00
CRC000
PRM000
0/1
0
1
Free-running mode
Selects count clock (setting “11” is prohibited).
Specifies rising edge for pulse width detection.
Setting invalid (setting “10” is prohibited.)
CR00 used as capture register
Captures to CR00 at inverse edge
to valid edge of TI000.
CR01 used as capture register