MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 153

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(8) Timer operation
(9) Capture operation
(10) Compare operation
(11) Edge detection
<1> Even if 16-bit timer counter 00 (TM00) is read, the value is not captured by 16-bit timer capture/compare
<2> Regardless of the CPU’s operation mode, when the timer stops, the input signals to the TI000/TI001 pins
<3> The one-shot pulse output mode operates correctly only in the free-running mode and the mode in which
<1> If the TI000 pin valid edge is specified as the count clock, a capture operation by the capture register
<2> To ensure the reliability of the capture operation, the capture trigger requires a pulse two cycles longer than
<3> The capture operation is performed at the falling edge of the count clock. An interrupt request input
A capture operation may not be performed for CR00/CR01 set in compare mode even if a capture trigger has
been input.
<1> If the TI000 or TI001 pin is high level immediately after system reset and the rising edge or both the rising
<2> The sampling clock used to remove noise differs when the TI000 pin valid edge is used as the count clock
register 01 (CR01).
are not acknowledged.
clear & start occurs at the TI000 valid edge. In the mode in which clear & start occurs on a match between
the TM00 register and CR00 register, one-shot pulse output is not possible because an overflow does not
occur.
specified as the trigger for TI000 is not possible.
the count clock selected by prescaler mode register 00 (PRM00).
(INTTM00/INTTM01), however, is generated at the rise of the next count clock.
and falling edges are specified as the valid edge of the TI000 or TI001 pin to enable the 16-bit timer counter
00 (TM00) operation, a rising edge is detected immediately after the operation is enabled. Be careful
therefore when pulling up the TI000 or TI001 pin. However, the rising edge is not detected at restart after
the operation has been stopped once.
and when it is used as a capture trigger. In the former case, the count clock is f
count clock is selected by prescaler mode register 00 (PRM00). The capture operation is only performed
when a valid level is detected twice by sampling the valid edge, thus eliminating noise with a short pulse
width.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U17890EJ2V0UD
X
, and in the latter case the
151