MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 277

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
<R>
17.1 Standby Function and Configuration
17.1.1 Standby function
Notes 1.
Caution The RSTOP setting is valid only when “Can be stopped by software” is set for internal low-speed
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
available.
(1) HALT mode
Operation
Mode
Reset
STOP
HALT
The standby function is designed to reduce the operating current of the system. The following two modes are
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped. If the
X1 oscillator, internal high-speed oscillator, or internal low-speed oscillator is operating before the HALT mode is
set, oscillation of each clock continues. In this mode, the operating current is not decreased as much as in the
STOP mode, but the HALT mode is effective for restarting operation immediately upon interrupt request
generation and carrying out intermittent operations.
2.
3.
4.
5.
6.
7.
Status
oscillator by an option byte.
RSTOP: Bit 0 of the internal oscillation mode register (RCM)
MCM0:
The high-speed system clock is selected (X1 clock or internal high-speed oscillation clock) by using the
option byte.
When “Cannot be stopped” is selected for internal low-speed oscillator by an option byte.
When “Can be stopped by software” is selected for internal low-speed oscillator by an option byte.
Only when internal low-speed oscillator is Oscillating.
Only when X1 or internal high-speed oscillation clock is Oscillating.
Operates using the CPU clock at STOP instruction execution.
Operates using the CPU clock at HALT instruction execution.
Stopped
Oscillating
High-speed System Clock
MSTOP = 0
Table 17-1. Relationship Between Operation Clocks in Each Operation Status
Bit 0 of the main clock mode register (MCM)
Stopped
MSTOP = 1
CHAPTER 17 STANDBY FUNCTION
Note 4
Note 1
Stopped
Oscillating
User’s Manual U17890EJ2V0UD
Note 2
Internal Low-speed Oscillator
Oscillating
RSTOP = 0
Note 3
Stopped
RSTOP = 1
Note 5
CPU Clock
Internal
low-speed
oscillation
clock
Note 6
Note 7
Release
After
Supplied to Peripherals
MCM0 = 0
Stopped
Stopped
Internal
low-speed
oscillation
clock
Prescaler Clock
High-
speed
system
clock
MCM0 = 1
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