MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 214

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.5.2 Trigger modes
These trigger modes are set by the ADS register.
(1) Software trigger mode
(2) External trigger mode (hardware trigger mode)
(3) Timer trigger mode (hardware trigger mode)
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The PD78F0711 and 78F0712 have the following three trigger modes that set the A/D conversion start timing.
This mode is used to start A/D conversion by setting the ADM.ADCS bit to 1 while the ADS.TRG bit is 0.
Conversion is repeatedly performed as long as the ADCS bit is not cleared to 0 after completion of A/D
conversion.
If the ADM, ADS, PFM, or PFT register is written during conversion, A/D conversion is aborted and started again
from the beginning.
This is the status in which the ADS.TRG bit is set to 1 and ADS.ADTMD bit is cleared to 0. This mode is used to
start A/D conversion by detecting an external trigger (ADTRG) after the ADCS bit has been set to 1.
The A/D converter waits for the external trigger (ADTRG) after the ADCS bit is set to 1.
The valid edge of the signal input to the ADTRG pin is specified by using the ADS.EGA1 and ADS.EGA0 bits.
When the specified valid edge is detected, A/D conversion is started.
When A/D conversion is completed, the A/D converter waits for the external trigger (ADTRG) again.
If a valid edge is input to the ADTRG pin during A/D conversion, A/D conversion continues without detecting the
trigger.
If the ADM, ADS, PFM, or PFT register is written during conversion, A/D conversion is aborted and the A/D
converter waits for an external trigger (ADTRG).
This mode is used to start A/D conversion by detecting a timer trigger (INTADTR) after the ADCS bit has been set
to 1 with the TRG bit = 1 and ADTMD bit = 1.
The A/D converter waits for the timer trigger (INTADTR) after the ADCS bit is set to 1.
When the INTADTR signal is generated, A/D conversion is started.
When A/D conversion is completed, the A/D converter waits for the timer trigger (INTADTR) again.
If the INTADTR signal is generated during A/D conversion, A/D conversion is aborted and started again from the
beginning.
If the ADM, ADS, PFM, or PFT register is written during conversion, A/D conversion is aborted and the A/D
converter waits for a timer trigger (INTADTR).
Software trigger mode
External trigger mode (hardware trigger mode)
Timer trigger mode (hardware trigger mode)
CHAPTER 13 A/D CONVERTER
User’s Manual U17890EJ2V0UD