MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 374

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

<R>
C.1 Major Revisions in This Edition
372
CHAPTER 2 PIN FUNCTIONS
INTRODUCTION
p.6
CHAPTER 1 OUTLINE
p.14
p.21
p.24
CHAPTER 3 CPU ARCHITECTURE
p.43
p.46
CHAPTER 4 PORT FUNCTIONS
p.56
p.59
p.63
p.71
CHAPTER 5 CLOCK GENERATOR
pp.73, 75, 82
p.76
CHAPTER 6 10-BIT INVERTER CONTROL TIMER
p.99
p.106
CHAPTER 10 REAL-TIME OUTPUT PORT
p.181
p.183
p.188
CHAPTER 12 Hi-Z OUTPUT CONTROLLER
p.195
p.196
CHAPTER 13 A/D CONVERTER
p.203
p.205
Remark “Classification” in the above table classifies revisions as follows.
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Change of Documents Related to Development Tools (Hardware) (User’s Manuals)
Addition of description
Addition of Note to Table 2-1 Pin I/O Buffer Power Supplies
Addition of Note to 2.2.3 (1) Port mode
Addition of register to Table 3-3 Special Function Register List (4/4)
Change of 3.3.3 Table indirect addressing
Addition of Note to Table 4-1 Pin I/O Buffer Power Supplies
Change of Figure 4-3 Block Diagram of P13
Addition of Caution to 4.2.3 Port 2
Addition of 4.5 Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn)
Addition of VSWC register to the next points
Table 5-1 Configuration of Clock Generator
5.3 Registers Controlling Clock Generator
Change of Figure 5-2 Format of Processor Clock Control Register (PCC)
Change of Figure 6-1 Block Diagram of 10-Bit Inverter Control Timer
Change of Figure 6-5 Format of Inverter Timer Output Control Register
Change of Figure 10-1 Block Diagram of Real-Time Output Port
Addition of description to < Cautions for development tools> in 10. 3 (1) Real-time output
port mode register 1 (RTPM01)
Change of Table 10-4 Relationship Between Settings of Each Bit of Control Register and
Real-Time Output
Change of Figure 12-1 Block Diagram of Hi-Z Output Controller
Change of address in Figure 12-2 Format of High-impedance Output Control Register 0
Change of Figure 13-3 Format of A/D Converter Mode Register (ADM)
Change of Table 13-3 A/D Conversion Time
APPENDIX C REVISION HISTORY
User’s Manual U17890EJ2V0UD
Description
Classification
(e)
(c)
(c)
(c)
(b)
(b)
(c)
(a)
(c)
(c)
(b)
(a)
(a)
(a)
(a)
(c)
(a)
(a)
(a)
(a)
(a)
(1/2)