MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 201

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

10.3.4
This 7-bit register is updated each machine cycle and represents the current interrupt requests for each
interrupt level, where bit 7 corresponds to level 7, bit 6 to level 6, etc. This register output is combined
with similar outputs from INTC1 and eventually encoded into the 3-bit priority interrupt level driven to
the processor core.
10.3.5
Each time an IACK is performed, the interrupt controller responds with the vector number of the highest
priority source within the level being acknowledged. In addition to providing the vector number directly
for the byte-sized IACK read, this 8-bit register is also loaded with information about the interrupt level
and priority being acknowledged. This register provides the association between the acknowledged
“physical” interrupt request number and the programmed interrupt level/priority. The contents of this
read-only register are described in
Freescale Semiconductor
Bits
Bits
7–1
0
7
Interrupt Request Level Register (IRLRn)
Interrupt Acknowledge Level and Priority Register (IACKLPRn)
Name
Name
IRQ
—
—
Address
Address
Interrupt requests. Represents the prioritized active interrupts for each level.
0 There are no active interrupts at this level
1 There is an active interrupt at this level
Reserved
Reserved
Reset
Reset
Field
Field
R/W
R/W
Figure 10-8. IACK Level and Priority Register (IACKLPRn)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 10-7. Interrupt Request Level Register (IRLRn)
—
7
7
Table 10-11. IACKLPRn Field Descriptions
Table 10-10. IRQn Field Descriptions
Figure 10-8
6
LEVEL
IPSBAR + 0xC18, 0xD18
IPSBAR + 0xC19, 0xD19
and
IRQ[7:1]
Table
0000_0000
0000_0000
4
Description
Description
R
R
10-11.
3
2
PRI
1
Interrupt Controller Modules
—
0
0
10-11