MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 619

IC MPU 32BIT COLDF 256-MAPBGA

MCF5214CVF66

Manufacturer Part Number
MCF5214CVF66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5214CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF521x
Maximum Speed
66 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
142
Interface Type
QSPI/UART/I2C/CAN
On-chip Adc
8-chx10-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Chapter 30
Debug Support
This chapter describes the Revision A enhanced hardware debug support.
30.1
The debug module is shown in
Debug support is divided into three areas:
Freescale Semiconductor
Real-time trace support—The ability to determine the dynamic execution path through an
application is fundamental for debugging. The ColdFire solution implements an 8-bit parallel
output bus that reports processor execution status and data to an external emulator system. See
Section 30.3, “Real-Time Trace
Background debug mode (BDM)—Provides low-level debugging in the ColdFire processor
complex. In BDM, the processor complex is halted and a variety of commands can be sent to the
processor to access memory and registers. The external emulator uses a three-pin, serial,
full-duplex channel. See
“Programming
Real-time debug support—BDM requires the processor to be halted, which many real-time
embedded applications cannot do. Debug interrupts let real-time systems execute a unique service
routine that can quickly save the contents of key registers and variables and return the system to
normal operation. External development systems can access saved data because the hardware
supports concurrent operation of the processor and BDM-initiated commands. See
“Real-Time Debug
Overview
Enabling Flash security disables BDM communications.
Control
Model.”
BKPT
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Support.”
Figure 30-1. Processor/Debug Module Interface
Figure
PST[3:0], DDATA[3:0]
Section 30.5, “Background Debug Mode
ColdFire CPU Core
Debug Module
Trace Port
CLKOUT
30-1.
Support.”
NOTE
Communication Port
DSCLK, DSI, DSO
(BDM),” and
High-speed
local bus
Section 30.4,
Section 30.6,
30-1

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