MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 761

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Self-received frames 25-10
Signals
Freescale Semiconductor
overview 15-1
registers
self-refresh 15-16
timing diagrams
timing specifications 33-17
block diagram 14-2
bus
chip configuration
chip configuration module
chip select module
clock module
debug
address and control 1–0 (DACRn) 15-6
control (DCR) 15-4
mask (DMRn) 15-8
mode register
read cycle 33-17
write cycle 33-18
address bus (A23–0) 14-19
byte strobes (BS3–0) 14-19
chip select (CS6–0) 14-21
data (D31–0) 14-19
output enable (OE) 14-19
read/write (R/W) 14-20
summary 13-1
transfer acknowledge (TA) 14-19
transfer error acknowledge (TEA) 14-20
transfer in progress (TIP) 14-21
transfer size (SIZ1–0) 14-20
transfer start (TS) 14-20
CLKMOD1–0 9-5
CLKMOD1–0 14-22
RCON 14-22
reset configuration override (D26–24, 21, 19–16) 27-3
byte strobes (BS3–0) 12-1
chip select (CS6–0) 12-1
output enable (OE) 12-1
CLKMOD1–0 9-5
clock output (CLKOUT) 9-5
EXTAL 9-4
RSTOUTl 9-5
XTAL 9-5
breakpoint (BKPT) 30-2
breakpoint/test mode select (BKPT/TMS) 14-30
CLKOUT 30-2
debug data (DDATA3–0) 14-31
development serial clock (DSCLK) 30-2
address multiplexing 15-9
general guidelines 15-9
initialization 15-23
settings 15-18
,
14-22
,
14-22
,
27-2
,
27-2
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
,
14-22
,
30-2
description by pin 32-4
DMA timers
Ethernet
external boot mode 14-18
FlexCAN
general purpose timers
I
interrupts
JTAG
2
C
development serial clock/test reset
development serial input (DSI) 30-2
development serial input/test data (DSI/TDI) 14-30
development serial output (DSO) 30-2
development serial output/test data (DSO/TDO) 14-30
JTAG_EN 14-29
processor status (PST3–0) 30-2
processor status output (PST3–0) 14-31
test clock (TCLK) 14-30
timer 0 input (DTIN0) 14-27
timer 0 output (DTOUT0) 14-27
timer 1 input (DTIN1) 14-27
timer 1 output (DTOUT1) 14-28
timer 2 input (DTIN2) 14-28
timer 2 output (DTOUT2) 14-28
timer 3 input (DTIN3) 14-28
timer 3 output (DTOUT3) 14-28
carrier receive sense (ECRS) 14-24
collision (ECOL) 14-24
management data (EMDIO) 14-23
management data clock (EMDC) 14-23
receive clock (ERXCLK) 14-24
receive data 0 (ERXDO) 14-24
receive data 3–1 (ERXD3–1) 14-24
receive data valid (ERXDV) 14-24
receive error (ERXER) 14-25
transmit clock (EXTCLK) 14-23
transmit data 0 (ETXD0) 14-23
transmit data 1–3 (ETXD3–1) 14-24
transmit enable (ETXEN) 14-23
transmit error (ETXER) 14-24
receive (CANRX) 14-25
transmit (CANTX) 14-25
external clock input (SYNCx) 14-27
GPTB3–0 14-27
GPTn2–0 20-3
GPTn3 20-3
GPTx3–0 14-27
serial clock (SCL) 14-26
serial data (SDA) 14-26
IRQ7–1 14-23
JTAG_EN 31-2
TCLK 31-3
(DSCLK/TRST) 14-30
,
20-4
Index-13