MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 82

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Enhanced Multiply-Accumulate Unit (EMAC)
3-4
Field
OMC
S/U
R/T
F/I
N
7
6
5
4
3
2
Z
Overflow saturation mode. Enables or disables saturation mode on overflow. If set, the accumulator is set
to the appropriate constant (see S/U field description) on any operation that overflows the accumulator.
After saturation, the accumulator remains unaffected by any other MAC or MSAC instructions until the
overflow bit is cleared or the accumulator is directly loaded.
Signed/unsigned operations.
In integer mode:
S/U determines whether operations performed are signed or unsigned. It also determines the accumulator
value during saturation, if enabled.
0 Signed numbers. On overflow, if OMC is enabled, an accumulator saturates to the most positive
1 Unsigned numbers. On overflow, if OMC is enabled, an accumulator saturates to the smallest value
In fractional mode:
S/U controls rounding while storing an accumulator to a general-purpose register.
0 Move accumulator without rounding to a 16-bit value. Accumulator is moved to a general-purpose
1 The accumulator is rounded to a 16-bit value using the round-to-nearest (even) method when moved to
Fractional/integer mode. Determines whether input operands are treated as fractions or integers.
0 Integers can be represented in signed or unsigned notation, depending on the value of S/U.
1 Fractions are represented in signed, fixed-point, two’s complement notation. Values range from -1 to
Round/truncate mode. Controls rounding procedure for move.l ACCx,Rx, or MSAC.L instructions when
in fractional mode.
0 Truncate. The product’s lsbs are dropped before it is combined with the accumulator. Additionally, when
1 Round-to-nearest (even). The 64-bit product of two 32-bit, fractional operands is rounded to the nearest
Negative. Set if the msb of the result is set, otherwise cleared. N is affected only by MAC, MSAC, and load
operations; it is not affected by MULS and MULU instructions.
Zero. Set if the result equals zero, otherwise cleared. This bit is affected only by MAC, MSAC, and load
operations; it is not affected by MULS and MULU instructions.
(0x7FFF_FFFF) or the most negative (0x8000_0000) number, depending on the instruction and the
product value that overflowed.
(0x0000_0000) or the largest value (0xFFFF_FFFF), depending on the instruction.
register as a 32-bit value.
a general-purpose register. See
lower word of the destination register. The upper word is zero-filled. This rounding procedure does not
affect the accumulator value.
1 - 2
Representation."
a store accumulator instruction is executed (move.l ACCx,Rx), the 8 lsbs of the 48-bit accumulator
logic are truncated.
40-bit value. If the low-order 24 bits equal 0x80_0000, the upper 40 bits are rounded to the nearest even
(lsb = 0) value. See
executed (move.l ACCx,Rx), the lsbs of the 48-bit accumulator logic round the resulting 16- or 32-bit
value. If MACSR[S/U] is cleared and MACSR[R/T] is set, the low-order 8 bits are used to round the
resulting 32-bit fraction. If MACSR[S/U] is set, the low-order 24 bits are used to round the resulting 16-bit
fraction.
-15
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
for 16-bit fractions and -1 to 1 - 2
Table 3-2. MACSR Field Descriptions (continued)
Section 3.3.1.1,
Section 3.3.1.1,
“Rounding”. Additionally, when a store accumulator instruction is
-31
Description
for 32-bit fractions. See
“Rounding”. The resulting 16-bit value is stored in the
Section 3.3.4, “Data
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