MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 80

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Enhanced Multiply-Accumulate Unit (EMAC)
3.1.1.1
The MAC is an extension of the basic multiplier in most microprocessors. It is typically implemented in
hardware within an architecture and supports rapid execution of signal processing algorithms in fewer
cycles than comparable non-MAC architectures. For example, small digital filters can tolerate some
variance in an algorithm’s execution time, but larger, more complicated algorithms such as orthogonal
transforms may have more demanding speed requirements beyond scope of any processor architecture and
may require full DSP implementation.
To balance speed, size, and functionality, the ColdFire MAC is optimized for a small set of operations that
involve multiplication and cumulative additions. Specifically, the multiplier array is optimized for
single-cycle pipelined operations with a possible accumulation after product generation. This functionality
is common in many signal processing applications. The ColdFire core architecture is also modified to
allow an operand to be fetched in parallel with a multiply, increasing overall performance for certain DSP
operations.
Consider a typical filtering operation where the filter is defined as in
Here, the output y(i) is determined by past output values and past input values. This is the general form of
an infinite impulse response (IIR) filter. A finite impulse response (FIR) filter can be obtained by setting
coefficients a(k) to zero. In either case, the operations involved in computing such a filter are multiplies
and product summing. To show this point, reduce
Equation
3-2
3-2, in which the accumulated sum is a past data values and coefficients sum.
Introduction to the MAC
y i ( )
=
k
∑
3
=
0
b k ( )x i k
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 3-1. Multiply-Accumulate Functionality Diagram
(
y i ( )
–
)
=
=
N 1
k
∑
b 0 ( )x i ( )
=
–
Operand Y
1
a k ( )y i k
(
+
Accumulator(s)
–
b 1 ( )x i 1
Shift 0,1,-1
)
Equation 3-1
+
+ / -
X
(
N 1
k
∑
=
–
–
0
b k ( )x i k
)
Operand X
+
b 2 ( )x i 2
(
–
to a simple, four-tap FIR filter, shown in
(
)
–
Equation
)
+
b 3 ( )x i 3
(
3-1.
–
)
Freescale Semiconductor
Eqn. 3-1
Eqn. 3-2