EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 153

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

DS785UM1
HC3IN:
HC3EN:
HC1IN:
HC1EN:
TIN:
U1EN:
EXVC:
U2EN:
Copyright 2007 Cirrus Logic
0 - GPIO Port H used for IDE
1 - GPIO Port H used for GPIO
HDLC3 clock in. This bit has no effect unless HC3EN is 1.
1 = pin EGPIO[3] is an input and drives an external HDLC
clock to UART3.
0 = pin EGPIO[3] is an output driven by UART3.
HDLC3 clock enable.
1 = pin EGPIO[3] is used to for an HDLC clock with
UART3.
0 = pin EGPIO[3] is not used.
HDLC1 clock in. This bit has no effect unless HC3EN is 0
and HC1EN is 1.
1 = pin EGPIO[3] is an input and drives an external HDLC
clock to UART1.
0 = pin EGPIO[3] is an output driven by UART1.
HDLC1 clock enable. This bit has no effect unless HC3EN
is 0.
1 = pin EGPIO[3] is used for an HDLC clock with UART1.
0 = pin EGPIO[3] is not used.
Touchscreen controller inactive.
1 - Touchscreen controller to inactive state,
0 - Touchscreen controller active.
To use the ADC converter independent of the Touch
screen controller, the Touchscreen controller must be
enabled and set inactive. The ADC can then be operated
using the direct access registers. The TIN bit does not
affect the ADC power state. ADC power down is directly
controlled by the ADCPD bit.
UART1 Enable.
1 - UART1 baud rate clock is active.
0 - UART1 clock is off.
External Video Clock.
1 - Raster engine uses external pixel clock and the SPCLK
pin is configured as an input,
0 - Raster engine uses internal pixel clock and the SPCLK
pin is configured as an output.
UART2 Enable.
1 - UART2 baud rate clock is active.
0 - UART2 clock is off.
EP93xx User’s Guide
System Controller
5-27
5