EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 598

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

17
17-2
IrDA
EP93xx User’s Guide
17.3.1 Overview
17.3.2 Functional Description
17.3 Shared IrDA Interface Feature
This section describes features common to the MIR and FIR interfaces (the SIR interface has
been designed to share the enable register and device pins but is otherwise a separate
interface assumed to be controlled by UART2).
The Slow Infrared (SIR) Encoder/Decoder is used to modulate and demodulate serial data
using the Hewlett-Packard
transmit data from UART2 is modulated using return-to-zero (RTZ) encoding to produce an
output to drive the Ir transmitter LED, while data received from the Ir detector is converted
into a serial bit stream to drive a UART's serial input. The SIR supports data rates up to
115.2 kbit/s.
The Medium Speed Infrared (MIR) Encoder/Decoder encodes/decodes peripheral bus data
according to a modified HDLC standard, using flag characters, bit stuffing and a 16 bit CRC
checker. MIR uses the same RTZ modulation and demodulation scheme used by the SIR.
Two signal bit rates are supported: 0.576 Mbit/s and 1.152 Mbit/s.
The Fast Infrared Encoder/Decoder (FIR) operates at a fixed bit rate of 4 Mbit/s.
Modulation/demodulation is by a phase shift key scheme called pulse position modulation
(4 PPM). One of four signalling symbols represent each possible pair of data bits. Data
encoding uses a packet format that prefixes bit and symbol synchronization flags to data and
appends a 32-bit CRC and stop flag to the end of each packet. The start and stop flags use
signalling symbols that are not used to encode data, hence bit stuffing of data is not required
in this mode.
Only one of the Encoder/Decoder modules can be enabled to transmit and receive data from
the IrDA transducers at one time Selection of an Ir sub-module is by means of the IrEnable
register. The MIR and FIR sub-modules can be regarded by programmers as independent
entities which are operated using common control and data registers, but which report status
data via separate read registers.
Detailed descriptions of the MIR and FIR are given in the following sections. The SIR,
however, has no data or control registers. It interfaces directly to a UART's serial stream.
With the exception of the IrEnable register, it has no presence on the memory map and has
no interface to the APB via the Infrared interface.
This section gives a programmer's guide to operating the IrDA interface. It includes detail on
the general configuration and the transmit and receive processes.
®
Serial Infrared standard (HP-SIR) for bit encoding. Serial
Copyright 2007 Cirrus Logic
DS785UM1