EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 327

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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DS785UM1
9.2.3.6 Receive Frame Pre-Processing
The MAC pre-processes all incoming receive frames. First the frame is either passed on to
the next level or discarded according to the destination address filter. The next decision is
whether to accept the frame. A frame is accepted when the frame data are brought into MAC
through internal memory. The final step in frame pre-processing is the decision on causing an
interrupt. These pre-processing steps are detailed in
A c c e p t M a s k s :
P r o m i s c u o u s A
B r o a d c a s t A
F i l t e r T a p s :
C R C R u n t A
In d i v i d u a l A
M u l t i c a s t A
E n d O f S r e a m i E
IA H a s h A
i E - M a s k T a p s :
R e c e i v e S t Q i E
R u n t A
Figure 9-12. Receive Frame Pre-processing
Copyright 2007 Cirrus Logic
i s A c c e p t e d i n t o t h e c h i p
a n d t h e F r a m e B o d y
S t a t u s i n R x E v e n t
F r a m e i s p a s s e d
In c o m i n g F r a m e
t o h o s t m e m o r y
b y d e s c r i p t o r
D e s t i n a t i o n
A c c e p t ( A )
p r o c e s s o r
A d d r e s s
M a s k
F i l t e r
i E
M a s k
A c c e p t M a s k
F i l t e r P a s s e d
P A S S E D
Figure
A c c e p t M a s k
P A S S E D
N O T
1/10/100 Mbps Ethernet LAN Controller
9-12.
If t h e f i l t e r i s n o t p a s s e d ,
t h e f r a m e i s d i s c a r d e d .
In t e r r u p t i f M a s k O K
d i s c a r d e d
EP93xx User’s Guide
f r a m e
9-25
9

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