EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 791

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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DS785UM1
28.1 Introduction
The General Purpose Input/Output (GPIO) is an Advanced Peripheral Bus (APB) slave
module. The GPIO block is the primary controller for the EGPIO, RDLED, GRLED, SLA[1:0],
EECLK, and EEDAT pins. It is a secondary controller for the ROW[7:0], COL[7:0], PCMCIA
and IDE control pins.
There are two types of GPIOs, standard and enhanced. The enhanced GPIO, called EGPIO,
have interrupt generation capability.
The GPIO block has eight ports, named Port A through Port H. Ports C, D, E, G, and H are
standard GPIO ports. Ports A, B, and F are enhanced GPIO ports.
Each GPIO port controls eight individual pins. Each port has an 8-bit data register and an 8-
bit data direction register. The EGPIO ports each have additional 8-bit registers for interrupt
configuration and status. The control of an individual pin is determined in a bit-slice fashion
across all registers for that port; only a single bit at a particular index from each register
affects or is affected by that pin.
Note: The EP9301 and EP9302 processors each have 18 standard GPIOs and 19 enhanced
Note: The EP9307 processor has 30 standard GPIOs and 18 enhanced GPIOs.
Note: The EP9312 processor has 31 standard GPIOs and 16 enhanced GPIOs.
Note: The EP9315 processor has 31 standard GPIOs and 24 enhanced GPIOs.
GPIOs.
Copyright 2007 Cirrus Logic
28GPIO Interface
Chapter 28
28-1
28

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