EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 359

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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TestCtl
IntEn
DS785UM1
31
15
31
15
RSVD / RWIE
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
RSVD
30
14
30
14
RxMIE
RSVD
29
13
29
13
RxBIE
MIIIE
28
12
28
12
0x8001_0008 - Read/Write
0x0000_0000
0x0000_0000
Test Control Register
RSVD:
MACF:
MFDX:
DB:
RSVD
RxSQIE
PHYSIE
27
11
27
11
TxLEIE
TIE
26
10
26
10
Copyright 2007 Cirrus Logic
RSVD
ECIE
25
25
9
9
Reserved. Unknown During Read.
MAC Fast. When set, internal MAC timers for link pulses
and collision backoff are scaled in order to speed-up
controller testing. When clear, normal timing is used.
MAC Full Duplex. This bit is used to enable full duplex
operation, when set, the transmitter ignores carrier sense
for transmit deferral. For normal loopback testing this bit
should be set.
Disable backoff. When set, the backoff algorithm is
disabled. The MAC transmitter looks only for completion of
the Inter Frame Gap before starting transmission. When
clear, the backoff algorithm is used as described in
Section 9.1.4 on page
TxUHIE
SWIE
24
24
8
8
RSVD
MACF
23
23
7
7
MFDX
22
22
6
6
RSVD
9--7.
RSVD
DB
21
21
1/10/100 Mbps Ethernet LAN Controller
5
5
20
20
4
4
TSQIE
19
19
3
3
EP93xx User’s Guide
REOFIE
RSVD
MOIE
18
18
2
2
REOBIE
TxCOIE
17
17
1
1
RxROIE
RHDRIE
16
16
9-57
0
0
9

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