EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 46

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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2
2-8
ARM920T Core and Advanced High-Speed Bus (AHB)
EP93xx User’s Guide
Before an AMBA-to-AHB transfer can commence, the bus master must be granted access to
the bus. This process is started by the master asserting a request signal to the Arbiter. The
Arbiter then indicates when the master will be granted use of the bus. A granted bus master
starts an AMBA-to-AHB transfer by driving the address and control signals. These signals
provide information on the address, direction and width of the transfer, as well as indicating
whether the transfer is part of a burst.
Two different forms of burst transfers are allowed:
• Incrementing bursts, which do not wrap at address boundaries
• Wrapping bursts, which wrap at particular address boundaries.
E
B
I
18 Bit Raster
Controller
PCMCIA
Ethernet
Memory/
SDRAM
LCD I/F
USB
Host
Static
IDE
AHB
Copyright 2007 Cirrus Logic
Figure 2-3. Main Data Paths
Boot ROM
ARM920T
Maverick
VIC2
VIC1
Crunch
DMA
UARTs
AHB/APB
Watchdog
Support
Timers
bridge
Test
RTC
AC97
APB
Clock & State
PLL1
8x8 Key Mtx
Touchscreen
Control
GPIOs
PWM
IrDA
SPI
I2S
PLL2
DS785UM1

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