EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 216

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

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Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
0010 - OR Blinking:
0011 - XOR Blinking:
0100 - Background Blinking:
0101 - Offset Single Blinking:
0111 through 1011 - Not used
1100 - Dim Single Blinking:
1101 - Bright Single Blinking:
be used to index into the LUT. The value at that index location will be passed on to the
Color Mux.
This new pixel value is used by the Color Mux as the 'new' value for the blinking pixel.
through the pipeline. See AND blinking for details on the differences between LUT and
non-LUT blinking.
continue through the pipeline. See AND blinking for details on the differences between
LUT and non-LUT blinking.
pixel value is placed into the pipeline and sent to the Color Mux.
the pixel data. The resulting pixel data will be placed into the pipeline and then sent to
the Color Mux.
mode will treat each of the 8 bit values as a single value, and apply the blinking rules
defined for the Offset Single Blinking mode.
corresponding 8 bits represent the value that will be added to the corresponding color.
If the LUT is enabled, the pixel data is passed to the LUT. The new pixel data value will
Non LUT Blink:
If the LUT is not enabled, the modified pixel data is moved directly into the Color Mux.
The pixel data is ORed with the BlinkMask register. The modified pixel data will continue
The pixel data is XORed with the
The pixel data is replaced with the value in the
The pixel data is manipulated by adding the value of the
0110 - Offset 888 Blinking:
The 24 bits of data is made up of three 8-bit values that represent the RGB colors. This
The
The pixel that is identified as a blinking pixel is manipulated:
The pixel that is identified as a blinking pixel is manipulated:
1.The LSB is dropped
2.The remaining bits are shifted right by one
3.The MSB is set to ‘0’
“BkgrndOffset”
value is itself treated as an 888 pixel where each of the
Copyright 2007 Cirrus Logic
“BlinkMask”
register. The modified pixel data will
“BkgrndOffset”
“BkgrndOffset”
register and the new
register with
DS785UM1