EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 803
![IC ARM9 SOC PROCESSOR 208LQFP](/photos/12/23/122385/mfg_ep9302_parts_sml.jpg)
EP9302-CQZ
Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9302-IQZ.pdf
(42 pages)
3.EP9302-IQZ.pdf
(4 pages)
4.EP9302-IQZ.pdf
(40 pages)
Specifications of EP9302-CQZ
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9302-CQZ
Manufacturer:
Cirrus
Quantity:
3 295
Company:
Part Number:
EP9302-CQZ
Manufacturer:
ALTERA
Quantity:
672
Part Number:
EP9302-CQZ
Manufacturer:
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Quantity:
20 000
- EP9307-CRZ PDF datasheet
- EP9302-IQZ PDF datasheet #2
- EP9302-IQZ PDF datasheet #3
- EP9302-IQZ PDF datasheet #4
- Current page: 803 of 824
- Download datasheet (13Mb)
GPIOxIntType2
DS785UM1
31
15
Bit Descriptions:
Address:
Definition:
Bit Descriptions:
The INTTYPE1 register controls what type of INTERRUPT can occur on Port A/B/F. Level
sensitive when “0” is written to a bit location (“0” default on reset), edge sensitive when “1” is
written to a bit location (the type of edge/level is controlled by the INTTYPE2 register). The
user must make sure that the direction of port A/B/F is set to input and the corresponding bit
in the GPIO INTERRUPT ENABLE register is set to allow the interrupt.
All bits are cleared by a system reset.
The GPIOxINTTYPE2 registers controls the type of edge/level sensitive interrupt that can
occur on the bits in Ports A/B/F.
The interrupt is rising edge or high level sensitive if a “1” is written to the corresponding bit in
GPIOxINTTYPE2 and falling edge or low level sensitive if a “0” is written to the corresponding
bit in GPIOxINTTYPE2. The user must make sure that the direction of port A/B/F is set to
input and the corresponding bits in the GPIO Interrupt Enable register and GPIOxINTTYPE1
are set correctly in order for this register to have any effect. For edge sensitive interrupts the
GPIOxINTTYPE1 bit should set high and low for level sensitive interrupts.
All bits are cleared by a system reset.
30
14
29
13
28
12
RSVD
RSVD:
PxINTE:
GPIOAIntType2: 0x8084_0094 - Read/Write
GPIOBIntType2: 0x8084_00B0 - Read/Write
GPIOFIntType2: 0x8084_0050 - Read/Write
RSVD:
PxINTR:
27
11
26
10
25
9
Copyright 2007 Cirrus Logic
Reserved. Unknown During Read.
Determines which type of interrupt may occur.
Reserved. Unknown During Read.
Determines which type of edge or level sensitive interrupt
may occur.
24
8
RSVD
23
7
22
6
21
5
20
4
PxINTR
19
3
EP93xx User’s Guide
18
2
GPIO Interface
17
1
28-13
16
0
28
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