EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 472

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

11
HcRhPortStatusx
11-32
Universal Serial Bus Host Controller
EP93xx User’s Guide
31
15
Address:
Default:
Definition:
Bit Descriptions:
Note: This bit is always read “1” when the attached device is nonremovable
30
14
(DeviceRemoveable.NDP).
29
13
RSVD
28
12
HcRhPortStatus1 - 0x8002_0054,
HcRhPortStatus2 - 0x8002_0058,
HcRhPortStatus3 - 0x8002_005C
0x0000_0100
Control/status for root hub port 1, 2, and 3 respectively
CCS:
27
11
RSVD
26
10
Copyright 2007 Cirrus Logic
LSDA
25
9
(READ) CurrentConnectStatus: This bit reflects the current
state of the downstream port.
0 = no device connected
1 = device connected
(WRITE) ClearPortEnable: The HCD writes a “1” to this bit
to clear the PortEnableStatus bit. Writing a “0” has no
effect. The CurrentConnectStatus is not affected by any
write.
PPS
24
8
23
7
RSVD
22
6
21
5
PRSC
PRS
20
4
OCIC
POCI
19
3
PSSC
PSS
18
2
PESC
PES
17
1
DS785UM1
CSC
CCS
16
0