DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 469

IC H8S/2300 MCU FLASH 128QFP

DF2398F20V

Manufacturer Part Number
DF2398F20V
Description
IC H8S/2300 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398F20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.2.5
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
TCSR0 and TCSR1 are 8-bit registers that display compare match and overflow statuses, and control compare match
output.
TCSR0 is initialized to H'00, and TCSR1 to H'10, by a reset and in hardware standby mode.
Bit 7—Compare Match Flag B (CMFB): Status flag indicating whether the values of TCNT and TCORB match.
Bit 6—Compare Match Flag A (CMFA): Status flag indicating whether the values of TCNT and TCORA match.
TCSR0
Bit
Initial value :
R/W
TCSR1
Bit
Initial value :
R/W
Timer Control/Status Registers 0 and 1 (TCSR0, TCSR1)
Bit 7
CMFB
0
1
Bit 6
CMFA
0
1
:
:
:
:
R/(W)*
R/(W)*
CMFB
CMFB
7
0
7
0
Description
[Clearing conditions]
[Setting condition]
Set when TCNT matches TCORB
Description
[Clearing conditions]
[Setting condition]
Set when TCNT matches TCORA
Cleared by reading CMFB when CMFB = 1, then writing 0 to CMFB
When DTC is activated by CMIB interrupt while DISEL bit of MRB in DTC is 0
Cleared by reading CMFA when CMFA = 1, then writing 0 to CMFA
When DTC is activated by CMIA interrupt while DISEL bit of MRB in DTC is 0
R/(W)*
R/(W)*
CMFA
CMFA
6
0
6
0
R/(W)*
R/(W)*
OVF
OVF
5
0
5
0
ADTE
R/W
4
0
4
1
OS3
R/W
OS3
R/W
3
0
3
0
OS2
R/W
OS2
R/W
2
0
2
0
OS1
R/W
OS1
R/W
Rev.6.00 Oct.28.2004 page 439 of 1016
1
0
1
0
OS0
R/W
OS0
R/W
0
0
0
0
(Initial value)
(Initial value)
REJ09B0138-0600H

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