DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 543

IC H8S/2300 MCU FLASH 128QFP

DF2398F20V

Manufacturer Part Number
DF2398F20V
Description
IC H8S/2300 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398F20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 14-12 SCI Interrupt Sources
Note: * This table shows the initial state immediately after a reset. Relative priorities among channels can be changed by
A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. The TEND flag is cleared at the
same time as the TDRE flag. Consequently, if a TEI interrupt and a TXI interrupt are requested simultaneously, the TXI
interrupt may be accepted first, with the result that the TDRE and TEND flags are cleared. Note that the TEI interrupt
will not be accepted in this case.
means of ICR and IPR.
Channel
0
1
2
Interrupt
Source
ERI
RXI
TXI
TEI
ERI
RXI
TXI
TEI
ERI
RXI
TXI
TEI
Description
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
DTC
Activation
Not
possible
Possible
Possible
Not
possible
Not
possible
Possible
Possible
Not
possible
Not
possible
Possible
Possible
Not
possible
Rev.6.00 Oct.28.2004 page 513 of 1016
DMAC
Activation
Not
possible
Possible
Possible
Not
possible
Not
possible
Possible
Possible
Not
possible
Not
possible
Not
possible
Not
possible
Not
possible
Priority*
REJ09B0138-0600H
High
Low

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