DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 676

IC H8S/2300 MCU FLASH 128QFP

DF2398F20V

Manufacturer Part Number
DF2398F20V
Description
IC H8S/2300 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398F20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19.20.2 RAM Overlap
An example in which flash memory block area EB1 is overlapped is shown below.
Example in Which Flash Memory Block Area EB1 is Overlapped
1. Set bits RAMS, RAM2, RAM1, and RAM0 in RAMER to 1, 0, 0, 1, to overlap part of RAM onto the area (EB1) for
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks regardless of the value of
Rev.6.00 Oct.28.2004 page 646 of 1016
REJ09B0138-0600H
which real-time programming is required.
2. A RAM area cannot be erased by execution of software in accordance with the erase algorithm while flash
3. Block area EB0 includes the vector table. When performing RAM emulation, the vector table is needed by the
RAM2, RAM1, and RAM0 (emulation protection). In this state, setting the P or E bit in flash memory control
register 1 (FLMCR1) will not cause a transition to program mode or erase mode. When actually programming
a flash memory area, the RAMS bit should be cleared to 0.
memory emulation in RAM is being used.
overlap RAM.
H'3FFFF
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
Figure 19-52 Example of RAM Overlap Operation
Flash memory
EB8 to EB11
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
This area can be accessed
from both the RAM area
and flash memory area
On-chip RAM
H'FFDC00
H'FFEBFF
H'FFFBFF

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