D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 101

IC SUPER H MPU ROMLESS 256BGA

D6417760BP200ADV

Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of D6417760BP200ADV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Pin No.
J20
K1
K2
K3
K4
K17
K18
K19
K20
L1
L2
L3
L4
L17
L18
L19
L20
M1
M2
M3
M4
M17
M18
M19
M20
N1
N2
N3
N4
N17
N18
N19
Pin Name
Reserved/AUDATA[3]
MFI-D12/LCD_DATA12
MFI-D4/LCD_DATA4/DREQ2
VDDQ
VSSQ
AVss_ADC
AVcc_ADC
ADTRG/AUDATA[0]
Reserved/AUDATA[1]
MFI-D13/LCD_DATA13
MFI-D5/LCD_DATA5/DRAK2/DACK2
CS4
A20
AN3
AN2
AN1
AN0
MFI-D14/LCD_DATA14
MFI-D6/LCD_DATA6/DREQ3
VDDQ
VSSQ
VSSQ
VDDQ
IRL3
IRL2
MFI-D15/LCD_DATA15
MFI-D7/LCD_DATA7/DRAK3/DACK3
CS5
A21
VSSQ
VDDQ
IRL1
I/O
IO/O/O/O MFI data/LCD panel data/DMAC3 request
O
IO/O
IO/O/I
I/O
O
IO/O
IO/O/O/O MFI data/LCD panel data/DMAC2 request
O
I
I
I
I
IO/O
IO/O/I
I
I
IO/O
O
O
I
Function
Reserved/H-UDI emulator
MFI data/LCD panel data
MFI data/LCD panel data/DMAC2 request
IO VDD
IO GND
ADC analog GND
ADC analog VCC
A/D external trigger/H-UDI emulator
Reserved/H-UDI emulator
MFI data/LCD panel data
acknowledgement/DMAC2 bus acknowledgement
Chip select 4
Address bus
ADC analog input
ADC analog input
ADC analog input
ADC analog input
MFI data/LCD panel data
MFI data/LCD panel data/DMAC3 request
IO VDD
IO GND
IO GND
IO VDD
IRL interrupt request 3
IRL interrupt request 2
MFI data/LCD panel data
acknowledgement/DMAC3 bus acknowledgement
Chip select 5
Address bus
IO GND
IO VDD
IRL interrupt request 1
Rev. 2.00 Feb. 12, 2010 Page 17 of 1330
REJ09B0554-0200
GPIO
Ο
Ο
Ο
Ο
Ο
Ο
Ο
Ο
Ο
Ο
Ο
Ο
Ο
*
2

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