D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 726

IC SUPER H MPU ROMLESS 256BGA

D6417760BP200ADV

Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of D6417760BP200ADV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Legend: etu: Elementary time unit
18.3.7
SIRSR is a register for reception of serial data.
The smart card interface receives serial data input from the SIM_D pin in order, from the LSB or
MSB, and sets it in SIRSR, converting it to parallel data. When reception of one byte of data is
completed, the data is automatically transferred to SIRDR. The CPU cannot directly read or write
SIRSR.
18.3.8
SIRDR is an 8-bit read-only register that stores received serial data.
When reception of one byte of serial data is completed, the smart card interface transfers the
received serial data from SIRSR to SIRDR for storage, and completes the reception operation.
Thereafter, SIRSR can receive data. In this way, SIRSR and SIRDR constitute a double buffer,
enabling continuous reception of data. SIRDR cannot be written from the CPU.
Rev. 2.00 Feb. 12, 2010 Page 642 of 1330
REJ09B0554-0200
Bit
0
Bit
7 to 0
Bit
Name
Receive Shift Register (SIRSR)
Receive Data Register (SIRDR)
Bit
Name
SIRD
7 to 0
Initial
Value
0
Initial value:
Initial
Value
All 0
R/W:
Bit:
R/W
R
SIRD7 SIRD6 SIRD5 SIRD4 SIRD3 SIRD2 SIRD1 SIRD0
R/W
R
R
7
0
Description
Reserved
This bit is always read as 0. The write value should also
always be 0.
6
0
R
Description
Receive Data
These bits store received serial data.
R
5
0
4
0
R
R
3
0
2
R
0
R
0
1
R
0
0

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