D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 831

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Host controller interface revision
register
Control register
Command status register
Interrupt status register
Interrupt enable register
Interrupt disable register
Host controller communication
area pointer register
Period current ED pointer register HcPeriodCurrentED
Control head ED pointer register HcControlHeadED
Control current ED pointer
register
Bulk head ED pointer register
Bulk current ED pointer register
Done queue head pointer register HcDoneHead
Frame interval register
Frame remaining register
Frame number register
Periodic start register
Low speed threshold register
Root hub descriptor A register
Root hub descriptor B register
Root hub status register
Root hub port status 1 register
Table 21.2 Register Configuration (2)
Register Name
Note: * After exiting hardware standby mode, this LSI enters the power-on reset state by the
RESET pin.
HcRevision
HcControl
HcCommandStatus
HcInterruptStatus
HcInterruptEnable
HcInterruptDisable
HcHCCA
HcControlCurrentED
HcBulkHeadED
HcBulkCurrentED
HcFmInterval
HcFmRemaining
HcFmNumber
HcPeriodicStart
HcLSThreshold
HcRhDescriptorA
HcRhDescriptorB
HcRhStatus
HcRhPortStatus1
Shared memory start
Shared memory end
Abbrev.
H'0000 0010
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 2EDF
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0628
H'0200 1202
H'0000 0000
H'0000 0000
H'0000 0100
Undefined
Undefined
Power-on Reset
by RESET
Pin/WDT/H-UDI
Rev. 2.00 Feb. 12, 2010 Page 747 of 1330
H'0000 0010
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 2EDF Retained
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0628
H'0200 1202
H'0000 0000
H'0000 0000
H'0000 0100
Undefined
Undefined
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
by Sleep
Instruction/
Deep Sleep
REJ09B0554-0200
by
Hardware
*
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
by
Software/
Each
Module