D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 949
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 23 Serial Protocol Interface (HSPI)
23.5
Power Saving and Clocking Strategy
The HSPI operates synchronized with the bus clock.
Module standby mode can be enabled or disabled by controlling the CSTP22 bit in the clock stop
register (CLKSTP00) in the CPG module.
To power down the module, follow the following procedure.
1. Ensure all data transfers have taken place. That is, the transmit buffer (or FIFOs) should be
empty and the receive buffer (or FIFOs) should have been read until they are empty.
2. Disable all DMA requests and interrupt requests. Disable FIFO mode.
3. Set the CSTP22 bit in clock stop clear register (CLKSTP00) to 1.
To wake up the HSPI, the CSTP22 bit in the clock stop register (CLKSTPCLR00) should be set to
1.
Rev. 2.00 Feb. 12, 2010 Page 865 of 1330
REJ09B0554-0200
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