D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 210

• Manufacturer Part Number: D6417760BP200ADV
• Description: IC SUPER H MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D6417760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev. 2.00 Feb. 12, 2010 Page 126 of 1330
REJ09B0554-0200
Bit
31 to 26 LRUI
25, 24
23 to 18 URB
17, 16
Bit Name
⎯
⎯
Initial Value
All 0
All 0
All 0
All 0
R/W
R/W
R
R/W
R
Description
Least Recently Used ITLB
These bits indicate the ITLB entry to be replaced.
The LRU (least recently used) method is used to
decide the ITLB entry to be replaced in the event
of an ITLB miss. The entry to be purged from the
ITLB can be confirmed using the LRUI bits.
LRUI is updated by means of the algorithm
shown below. x means that updating is not
performed.
000xxx: ITLB entry 0 is used
1xx00x: ITLB entry 1 is used
x1x1x0: ITLB entry 2 is used
xx1x11: ITLB entry 3 is used
xxxxxx: Other than above
When the LRUI bit settings are as shown below,
the corresponding ITLB entry is updated by an
ITLB miss. Ensure that values for which "Setting
prohibited" is indicated below are not set at the
discretion of software. After a power-on or
manual reset, the LRUI bits are initialized to 0,
and therefore a prohibited setting is never made
by a hardware update.
x means "don't care".
111xxx: ITLB entry 0 is updated
0xx11x: ITLB entry 1 is updated
x0x0x1: ITLB entry 2 is updated
xx0x00: ITLB entry 3 is updated
Other than above: Setting prohibited
Reserved
These bits are always read as 0. The write value
should always be 0.
UTLB Replace Boundary
These bits indicate the UTLB entry boundary at
which replacement is to be performed. Valid only
when URB > 0.
Reserved
These bits are always read as 0. The write value
should always be 0.