D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 933
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
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Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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This LSI incorporates one channel of the Serial Protocol Interface (HSPI).
23.1
The HSPI has the following features.
• Operating mode: Master mode or Slave mode.
• The transmit and receive sections within the module are double buffered to allow duplex
• A flexible peripheral clock division strategy allows a wide range of bit rates to be supported.
• The programmable clock control logic allows setting for two different transmit protocols and
• Error detection logic is provided for warning of the receive buffer overflow.
• The HSPI has a facility to generate the chip select signal to slave modules when configured as
• The HSPI supports DMA transfer of both receive and transmit data independently via two
communication.
accommodates transmit and receive functions on either edge of the serial bit clock.
a master mode either automatically as part of the data transfer process, or under the manual
control of the host processor.
DMA channels if implemented in the system.
Features
Section 23 Serial Protocol Interface (HSPI)
Rev. 2.00 Feb. 12, 2010 Page 849 of 1330
REJ09B0554-0200
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