D6417760BP200ADV Renesas Electronics America, D6417760BP200ADV Datasheet - Page 475
D6417760BP200ADV
Manufacturer Part Number
D6417760BP200ADV
Description
IC SUPER H MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of D6417760BP200ADV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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11.3.4
CHCR is a 32-bit readable/writable register that specifies the operating mode and transfer method
for each channel. Bits 31 to 28 and 27 to 24 are only valid when the source and destination
addresses are in the CS5 or CS6 space and the relevant space has been specified as a PCMCIA
interface space. In other cases, these bits should be cleared to 0.
Initial value:
Initial value:
Bit
31
30
29
R/W:
R/W:
Bit:
Bit:
DMA Channel Control Register (CHCR)
Bit Name
SSA2
SSA1
SSA0
SSA2
DM1
R/W
R/W
31
15
0
0
SSA1 SSA0
R/W
DM0
R/W
30
14
0
0
SM1
R/W
R/W
29
13
0
0
Initial Value
0
0
0
SM0
STC
R/W
R/W
28
12
0
0
DSA2 DSA1 DSA0
RS3
R/W
R/W
27
11
0
0
RS2
R/W
R/W
26
10
0
0
R/W
R/W
R/W
R/W
R/W
RS1
R/W
25
0
0
9
Description
Source Address Space Attribute Specification
These bits specify the space attribute for the
source address when accessing a PCMCIA
interface area. These bits are only valid in the
case of page mapping to PCMCIA connected to
areas 5 and 6.
000: Reserved in PCMCIA access
001: Dynamic bus sizing I/O space
010: 8-bit I/O space
011: 16-bit I/O space
100: 8-bit common memory space
101: 16-bit common memory space
110: 8-bit attribute memory space
111: 16-bit attribute memory space
DTC
RS0
R/W
R/W
24
0
8
0
R/W
TM
23
R
0
7
0
-
Rev. 2.00 Feb. 12, 2010 Page 391 of 1330
R/W
TS2
22
R
0
6
0
-
TS1
R/W
21
R
0
5
0
-
R/W
TS0
20
R
0
4
0
-
CHSET
R/W
R/W
DS
19
0
3
0
REJ09B0554-0200
R/W
R/W
18
RL
IE
2
0
0
R/W
R/W
AM
TE
17
0
1
0
R/W
R/W
DE
16
AL
0
0
0
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