PIC18F46J50-I/PT Microchip Technology, PIC18F46J50-I/PT Datasheet - Page 147

• Manufacturer Part Number: PIC18F46J50-I/PT
• Description: IC PIC MCU FLASH 64KB 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• No. Of Pwm Channels: 2
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Interface Type: I2C/SPI/USART/USB
• On-chip Adc: 13-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164330 - MODULE SKT FOR 44TQFP 18F45J10
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Choosing the configuration requires the review of all
PPSs and their pin assignments, especially those that
will not be used in the application. In all cases, unused
pin selectable peripherals should be disabled com-
pletely. Unused peripherals should have their inputs
assigned to an unused RPn pin function. I/O pins with
unused RPn functions should be configured with the
null peripheral output.
The assignment of a peripheral to a particular pin does
not automatically perform any other configuration of the
pin’s I/O circuitry. In theory, this means adding a pin
selectable output to a pin may mean inadvertently driv-
ing an existing peripheral input when the output is
driven. Users must be familiar with the behavior of
other fixed peripherals that share a remappable pin and
know when to enable or disable them. To be safe, fixed
digital peripherals that share the same pin should be
disabled when not in use.
Along these lines, configuring a remappable pin for a
specific peripheral does not automatically turn that
feature on. The peripheral must be specifically config-
ured for operation and enabled, as if it were tied to a
fixed pin. Where this happens in the application code
(immediately following device Reset and peripheral
configuration or inside the main application routine)
depends on the peripheral and its use in the
application.
A final consideration is that the PPS functions neither
override analog inputs nor reconfigure pins with analog
functions for digital I/O. If a pin is configured as an
analog input on device Reset, it must be explicitly
reconfigured as digital I/O when used with a PPS.
Example 9-7 provides a configuration for bidirectional
communication with flow control using EUSART2. The
following input and output functions are used:
• Input Function RX2
• Output Function TX2
© 2009 Microchip Technology Inc.
PIC18F46J50 FAMILY
EXAMPLE 9-7:
//*************************************
// Unlock Registers
//*************************************
_asm
MOVLB 0x0E
BCF
MOVLW 0x55
MOVWF EECON2, 0
MOVLW 0xAA
MOVWF EECON2, 0
BCF
_endasm
//***************************
// Configure Input Functions
// (See Table 9-13)
//***************************
_asm
MOVLW 0X00
MOVWF RPINR16, BANKED
_endasm
//***************************
// Configure Output Functions
// (See Table 9-14)
//***************************
_asm
MOVLW 0X05
MOVWF RPOR1, BANKED
_endasm
//*************************************
// Lock Registers
_asm
BCF
MOVLW 0x55
MOVWF EECON2, 0
MOVLW 0xAA
MOVWF EECON2, 0
BSF
_endasm
Note:
//***************************
// Assign RX2 To Pin RP0
//***************************
//***************************
// Assign TX2 To Pin RP1
//***************************
INTCON, GIE
PPSCON, IOLOCK, BANKED ;Write protect off
INTCON, GIE
PPSCON, IOLOCK, BANKED ;PPS Write
If the Configuration bit, IOL1WAY = 1,
once the IOLOCK bit is set, it cannot be
cleared, preventing any future RP register
changes. The IOLOCK bit is cleared back
to ‘0’ on any device Reset.
CONFIGURING EUSART2
INPUT AND OUTPUT
FUNCTIONS
;PPS registers are
in BANK 14
;Disable interrupts
for unlock sequence
;Disable interrupts
for unlock sequence
Protected
DS39931C-page 147