PIC18F46J50-I/PT Microchip Technology, PIC18F46J50-I/PT Datasheet - Page 516

IC PIC MCU FLASH 64KB 44-TQFP

PIC18F46J50-I/PT

Manufacturer Part Number
PIC18F46J50-I/PT
Description
IC PIC MCU FLASH 64KB 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F46J50-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
2
No. Of Pwm Channels
2
Package
44TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Interface Type
I2C/SPI/USART/USB
On-chip Adc
13-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164330 - MODULE SKT FOR 44TQFP 18F45J10
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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PIC18F46J50 FAMILY
FIGURE 29-15:
TABLE 29-22: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
DS39931C-page 516
70
70A
71
71A
72
72A
73
73A
74
75
76
77
80
81
82
83
Note 1:
Param
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SDIx
SSx
SCKx
SCKx
SDOx
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SS
SC
SC
SC
SC
SS
SC
SC
SS
SC
SC
DI
DI
B
DO
DO
DO
DO
Symbol
2
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
V2
V2
L2
L2
L2
L2WB
H2
H2
L2
H2
L2
Refer to Figure 29-4 for load conditions.
H
L
H2
L2
B
V2
V2
R
F
DO
SC
SC
DO
SS
SC
SC
DI
DO
SS
DO
DI
SC
SC
L
L,
H
H,
L
H,
L
V
V
H,
V,
H,
L
Z
SSx ↓ to SCKx ↓ or SCKx ↑ Input
SSx ↓ to Write to SSPxBUF
SCKx Input High Time
(Slave mode)
SCKx Input Low Time
(Slave mode)
Setup Time of SDIx Data Input to SCKx Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SSx ↑ to SDOx Output High-Impedance
SDOx Data Output Valid after SCKx Edge
SDOx Data Output Setup to SCKx Edge
SDOx Data Output Valid after SSx ↓ Edge
SSx ↑ after SCKx Edge
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
82
70
73
MSb In
MSb
74
71
75, 76
Characteristic
72
bit 6 - - - - - - 1
bit 6 - - - - 1
Continuous
Single byte
Continuous
Single byte
80
LSb
LSb In
1.25 T
1.25 T
1.5 T
3 T
3 T
Min
100
T
40
40
25
CY
35
10
CY
CY
CY
CY
CY
CY
+ 40
+ 40
+ 30
+ 30
83
© 2009 Microchip Technology Inc.
Max Units
100
25
25
70
50
50
77
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
V
V
DD
DDCORE
DD
DD
DDCORE
DD
Conditions
= 3.3V,
= 2.15V
= 3.3V,
= 2.15V
= 2.5V
= 2.5V

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