PIC18F46J50-I/PT Microchip Technology, PIC18F46J50-I/PT Datasheet - Page 258

IC PIC MCU FLASH 64KB 44-TQFP

PIC18F46J50-I/PT

Manufacturer Part Number
PIC18F46J50-I/PT
Description
IC PIC MCU FLASH 64KB 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F46J50-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
2
No. Of Pwm Channels
2
Package
44TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Interface Type
I2C/SPI/USART/USB
On-chip Adc
13-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164330 - MODULE SKT FOR 44TQFP 18F45J10
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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0
PIC18F46J50 FAMILY
REGISTER 17-3:
17.5.7
In Single Output mode, pulse steering allows any of the
PWM pins to be the modulated signal. Additionally, the
same PWM signal can simultaneously be available on
multiple pins.
Once
(CCPxM<3:2> = 11 and PxM<1:0> = 00 of the
CCPxCON register), the user firmware can bring out
the same PWM signal to one, two, three or four output
pins by setting the appropriate STR<D:A> bits of the
PSTRxCON register, as provided in Table 17-4.
DS39931C-page 258
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
Note:
PxRSEN
R/W-0
the
PULSE STEERING MODE
The associated TRIS bits must be set to
output (‘0’) to enable the pin output driver
in order to see the PWM signal on the pin.
Single
PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPxASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPxASE must be cleared by software to restart the PWM
PxDC<6:0>: PWM Delay Count bits
PxDCn = Number of F
PxDC6
R/W-0
away; the PWM restarts automatically
ECCPxDEL: ENHANCED PWM CONTROL REGISTER (ACCESS FBDh, FB7h)
Output
should transition active and the actual time it transitions active.
W = Writable bit
‘1’ = Bit is set
mode
PxDC5
R/W-0
OSC
is
/4 (4 * T
selected
PxDC4
R/W-0
OSC
) cycles between the scheduled time when a PWM signal
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PxDC3
R/W-0
While the PWM Steering mode is active, the
CCPxM<1:0> bits of the CCPxCON register select the
PWM output polarity for the Px<D:A> pins.
The PWM auto-shutdown operation also applies to
PWM Steering mode as described in Section 17.5.4
“Enhanced
auto-shutdown event will only affect pins that have
PWM outputs enabled.
PxDC2
R/W-0
PWM
Auto-shutdown
© 2009 Microchip Technology Inc.
x = Bit is unknown
PxDC1
R/W-0
mode”.
PxDC0
R/W-0
bit 0
An

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