PIC18F46J50-I/PT Microchip Technology, PIC18F46J50-I/PT Datasheet - Page 260

• Manufacturer Part Number: PIC18F46J50-I/PT
• Description: IC PIC MCU FLASH 64KB 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• No. Of Pwm Channels: 2
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Interface Type: I2C/SPI/USART/USB
• On-chip Adc: 13-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164330 - MODULE SKT FOR 44TQFP 18F45J10
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F46J50 FAMILY
FIGURE 17-18:
FIGURE 17-19:
FIGURE 17-20:
DS39931C-page 260
Note 1: Port outputs are configured as displayed when
P1<D:A>
PORT Data
PORT Data
PORT Data
PORT Data
STRn
P1<D:A>
PxA Signal
PWM
CCPxM1
CCPxM0
CCPxM1
CCPxM0
2: Single PWM output requires setting at least
STRn
PWM
STRA
STRB
STRC
STRD
the CCPxCON register bits, PxM<1:0> = 00
and CCPxM<3:2> = 11.
one of the STRx bits.
PORT Data
SIMPLIFIED STEERING
BLOCK DIAGRAM
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION (STRSYNC = 1)
1
0
1
0
1
0
1
0
PORT Data
PWM Period
TRIS
TRIS
TRIS
TRIS
RPn pin
RPn pin
RPn pin
RPn pin
P1n = PWM
17.5.7.1
The STRSYNC bit of the PSTRxCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRxCON register. In this case, the out-
put signal at the Px<D:A> pins may be an incomplete
PWM waveform. This operation is useful when the user
firmware needs to immediately remove a PWM signal
from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
Figures 17-19 and 17-20 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
P1n = PWM
Steering Synchronization
PORT Data
© 2009 Microchip Technology Inc.
PORT Data