PIC18F46J50-I/PT Microchip Technology, PIC18F46J50-I/PT Datasheet - Page 150

• Manufacturer Part Number: PIC18F46J50-I/PT
• Description: IC PIC MCU FLASH 64KB 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• No. Of Pwm Channels: 2
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Interface Type: I2C/SPI/USART/USB
• On-chip Adc: 13-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164330 - MODULE SKT FOR 44TQFP 18F45J10
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F46J50 FAMILY
REGISTER 9-9:
REGISTER 9-10:
REGISTER 9-11:
DS39931C-page 150
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
U-0
U-0
U-0
—
—
—
Unimplemented: Read as ‘0’
T0CKR<4:0>: Timer0 External Clock Input (T0CKI) to the Corresponding RPn Pin bits
Unimplemented: Read as ‘0’
T3CKR<4:0>: Timer 3 External Clock Input (T3CKI) to the Corresponding RPn Pin bits
Unimplemented: Read as ‘0’
IC1R<4:0>: Assign Input Capture 1 (ECCP1) to the Corresponding RPn Pin bits
U-0
U-0
U-0
—
—
—
RPINR4: PERIPHERAL PIN SELECT INPUT REGISTER 4 (BANKED EEAh)
RPINR6: PERIPHERAL PIN SELECT INPUT REGISTER 6 (BANKED EECh)
RPINR7: PERIPHERAL PIN SELECT INPUT REGISTER 7 (BANKED EEDh)
R/W = Readable, Writable if IOLOCK = 0
W = Writable bit
R/W = Readable, Writable if IOLOCK = 0
W = Writable bit
R/W = Readable, Writable if IOLOCK = 0
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
U-0
—
—
—
T0CKR4
T3CKR4
R/W-1
R/W-1
R/W-1
IC1R4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T0CKR3
T3CKR3
R/W-1
R/W-1
R/W-1
IC1R3
T0CKR2
T3CKR2
R/W-1
R/W-1
R/W-1
IC1R2
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
T0CKR1
T3CKR1
R/W-1
R/W-1
R/W-1
IC1R1
T0CKR0
T3CKR0
R/W-1
R/W-1
R/W-1
IC1R0
bit 0
bit 0
bit 0