PIC18F46J50-I/PT Microchip Technology, PIC18F46J50-I/PT Datasheet - Page 168

• Manufacturer Part Number: PIC18F46J50-I/PT
• Description: IC PIC MCU FLASH 64KB 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3.6875KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• No. Of Pwm Channels: 2
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Interface Type: I2C/SPI/USART/USB
• On-chip Adc: 13-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164330 - MODULE SKT FOR 44TQFP 18F45J10
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F46J50 FAMILY
REGISTER 10-5:
REGISTER 10-6:
DS39931C-page 168
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
PTEN15
PTEN7
R/W-0
R/W-0
This register is only available in 44-pin devices.
This register is only available in 44-pin devices.
PTEN<15:14>: PMCS1 Port Enable bits
1 = PMA<15:14> function as either PMA<15:14> or PMCS2 and PMCS1
0 = PMA<15:14> function as port I/O
PTEN<13:8>: PMP Address Port Enable bits
1 = PMA<13:8> function as PMP address lines
0 = PMA<13:8> function as port I/O
PTEN<7:2>: PMP Address Port Enable bits
1 = PMA<7:2> function as PMP address lines
0 = PMA<7:2> function as port I/O
PTEN<1:0>: PMALH/PMALL Strobe Enable bits
1 = PMA<1:0> function as either PMA<1:0> or PMALH and PMALL
0 = PMA<1:0> pads functions as port I/O
PTEN14
PTEN6
R/W-0
R/W-0
PMEH: PARALLEL PORT ENABLE REGISTER HIGH BYTE (BANKED F57h)
PMEL: PARALLEL PORT ENABLE REGISTER LOW BYTE (BANKED F56h)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PTEN13
PTEN5
R/W-0
R/W-0
PTEN12
PTEN4
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PTEN11
PTEN3
R/W-0
R/W-0
PTEN10
PTEN2
R/W-0
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
PTEN1
PTEN9
R/W-0
R/W-0
PTEN8
PTEN0
R/W-0
R/W-0
(1)
(1)
bit 0
bit 0