MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 488

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MCF5253VM140J

Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253VM140J

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5253VM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Universal Serial Bus Interface
24.6.3.10 Master Interface Data Burst Size Register (BURSTSIZE)—Non-EHCI
This register is not defined in the EHCI specification. This register is used to control and dynamically
change the burst size used during data movement on the initiator (master) interface.
24-26
EPBASE
Address MBAR2 0x758 (Device Mode)
Address MBAR2 0x760
31–11
Field
10–0
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
Endpoint List Address. Address of the top of the endpoint list.
Reserved.
Table 24-23. Endpoint List Address (ENDPOINTLISTADDR) Register Field Descriptions
31
15
31
15
0
0
0
0
30
14
30
14
0
0
0
0
EPBASE(con’t)
Figure 24-22. Master Interface Data Burst Size (BURSTSIZE) Register
Figure 24-21. Endpoint List Address (ENDPOINTLISTADDR) Register
29
13
29
13
0
0
0
0
TXPBURST
28
12
28
12
0
0
0
0
27
11
27
11
0
0
0
0
MCF5253 Reference Manual, Rev. 1
26
10
26
10
0
0
0
1
25
25
0
0
0
0
9
9
Description
24
24
EPBASE
0
0
0
0
8
8
23
23
0
0
0
0
7
7
22
22
0
0
0
0
6
6
21
21
0
0
0
0
5
5
RXPBURST
20
20
0
0
0
0
4
4
19
19
0
0
0
0
3
3
Freescale Semiconductor
Access: User read/write
Access: User read/write
18
18
0
0
0
1
2
2
17
17
0
0
0
0
1
1
16
16
0
0
0
0
0
0

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