MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 574

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Universal Serial Bus Interface
If Test A is true and FRINDEX[2:0] is zero or one, then this is a case 2a or 2b scheduling boundary (see
Figure
details in handling this condition.
If Test A and Test B evaluate to true, then the host controller executes a complete-split transaction using
the transfer state of the current siTD. When the host controller commits to executing the complete-split
transaction, it updates QH[C-prog-mask] by bit-ORing with cMicroFrameBit. The transfer state is
advanced based on the completion status of the complete-split transaction. To advance the transfer state of
an IN siTD, the host controller must:
Note that if the host controller encounters a condition where siTD[Total Bytes To Transfer] is zero, and it
receives more data, the host controller must not write the additional data to memory. The
siTD[Status-Active] bit must be cleared and the siTD[Status-Babble Detected] bit must be set. The fields
siTD[Total Bytes To Transfer], siTD[Current Offset], and siTD[P] are not required to be updated as a result
of this transaction attempt.
The host controller accepts (assuming good data packet CRC and sufficient room in the buffer as indicated
by the value of siTD[Total Bytes To Transfer]) MDATA and DATA0/1 data payloads up to and including
192 bytes. The host controller may optionally clear siTD[Status-Active] and set siTD[Status-Babble
Detected] when it receives MDATA or DATA0/1 with a data payload of more than 192 bytes.
24-112
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•
•
•
•
24-57). See
Test B. The siTD[C-prog-mask] bit vector is checked to determine whether the previous complete
splits have been executed. An example algorithm is given below (this is slightly different than the
algorithm used in
which this test is applied depends on the current value of FRINDEX[2:0]. If FRINDEX[2:0] is 0
or 1, it is not applied until the back pointer has been used. Otherwise it is applied immediately.
Decrement the number of bytes received from siTD[Total Bytes To Transfer]
Adjust siTD[Current Offset] by the number of bytes received
Adjust the siTD[P] (page select) field if the transfer caused the host controller to use the next page
pointer
Set any appropriate bits in the siTD[Status] field, depending on the results of the transaction.
Algorithm Boolean CheckPreviousBit(siTD.C-prog-mask, siTD.C-mask, cMicroFrameBit)
Begin
End Algorithm
Boolean rvalue = TRUE;
previousBit = cMicroFrameBit rotate-right(1)
-- Bit-wise anding previousBit with C-mask indicates whether there
-- was an intent to send a complete split in the previous micro-
-- frame. So, if the 'previous bit' is set in C-mask, check
-- C-prog-mask to make sure it happened.
if previousBit bitAND siTD.C-mask then
End if
Return rvalue
Section 24.9.12.3.6, “Complete-Split for Scheduling Boundary Cases 2a, 2b,”
if not (previousBit bitAND siTD.C-prog-mask) then
End if
Section 24.9.12.2.7, “Periodic
MCF5253 Reference Manual, Rev. 1
Interrupt—Do-Complete-Split”). The sequence in
rvalue = FALSE
Freescale Semiconductor
for