MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 50

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Signal Description
2-4
CAN interface
USB PHY interface
USB oscillator
RTC oscillator
AD IN
AD OUT
QSPI clock
QSPI data in
QSPI data out
QSPI chip selects
System oscillator in
System oscillator out
Reset In
Freescale Test Mode
Linear regulator output
Linear regulator input
Linear regulator ground LINGND
Signal Name
RCK/QSPIDIN/QSPIDOUT/GPIO26
CAN0_TX
CAN0_RX
CAN1_TX
CAN1_RX
USBVBUS
USBID
USBRES
USBDN
USBDP
USB_CRIN
USB_CROUT
RTC_CRIN
RTCCROUT
ADIN0/GPI52
ADIN1/GPI53
ADIN2/GPI54
ADIN3/GPI55
ADIN4/GPI56
ADIN5/GPI57
ADREF
ADOUT/SCLK4/GPIO58
QSPICLK/SUBR/GPIO25
RCK/QSPIDIN/QSPIDOUT/GPIO26
QSPIDOUT/SFSY/GPIO27
QSPICS0/EBUIN4/GPIO15
QSPICS1/EBUOUT2/GPIO16
QSPICS2/MCLK2/GPIO24
CS1/QSPICS3/GPIO28
CRIN
CROUT
RSTI
TEST[2:0]
LINOUT
LININ
Table 2-1. MCF5253 Signal Index (continued)
Mnemonic
MCF5253 Reference Manual, Rev. 1
CAN 0 transmit
CAN 0 receive
CAN 1 transmit
CAN 1 receive
USB Vbus input
USB ID input
USB current programming resistor pin
USB DM signalling line
USB DP signalling line
Connections for USB oscillator crystal
(24 MHz)
Connections for real-time clock crystal
(32.768 kHz)
Analog-to-Digital Converter input
signals
Analog-to-Digital Converter output
signal—connects to ADREF via
integrator network.
QSPI clock signal
QSPI data input
QSPI data out
QSPI chip selects
System input
System output
Processor reset input
TEST pins.
Output of 1.2 V to supply core
Input, typically I/O supply (3.3V)
Function
Freescale Semiconductor
Output
Analog
Input/
In/Out
In/Out
In/Out
In/Out
In/Out
In/Out
In/Out
Out
Out
Out
Out
Out
Out
In
In
In
In
In
In
In
In
In
In
In
Reset
State
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–