HD64F3684FP Renesas Electronics America, HD64F3684FP Datasheet - Page 135

• Manufacturer Part Number: HD64F3684FP
• Description: IC H8 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3684FP

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

8. The maximum number of repetitions of the program/program-verify sequence of the same bit
is 1,000.
Notes: * The RTS instruction must not be used during the following 1. and 2. periods.
Wait (Wait time=programming time)
Write pulse application subroutine
1. A period between 128-byte data programming to flash memory and the P bit clearing
2. A period between dummy writing of H'FF to a verify address and verify data reading
Clear PSU bit in FLMCR1
Set PSU bit in FLMCR1
Clear P bit in FLMCR1
Set P bit in FLMCR1
Apply Write Pulse
WDT enable
Disable WDT
Wait 50 s
Wait 5 s
Wait 5 s
End Sub
Figure 7.3 Program/Program-Verify Flowchart
*
Increment address
Successively write 128-byte data from additional-
programming data area in RAM to flash memory
No
Additional-programming data computation
Store 128-byte program data in program
data area consecutively to flash memory
Write 128-byte data in RAM reprogram
H'FF dummy write to verify address
data area and reprogram data area
Clear SWE bit in FLMCR1
Set block start address as
Reprogram data computation
data verification completed?
Set SWE bit in FLMCR1
Clear PV bit in FLMCR1
Set PV bit in FLMCR1
Apply Write Pulse
End of programming
Apply
Read verify data
verify address
Yes
Yes
Wait 100 s
Verify data =
write data?
Wait 1 s
Wait 4 s
Wait 2 s
Wait 2 s
Yes
128-byte
START
n 6 ?
m= 0 ?
m= 0
n 6?
n= 1
Write pulse
Yes
Yes
Sub-Routine-Call
No
No
No
Rev.5.00 Nov. 02, 2005 Page 101 of 500
No
*
m = 1
Clear SWE bit in FLMCR1
Programming failure
Wait 100 s
n
1000 ?
No
Yes
n
REJ09B0027-0500
n + 1
Section 7 ROM