HD64F3684FP Renesas Electronics America, HD64F3684FP Datasheet - Page 263

• Manufacturer Part Number: HD64F3684FP
• Description: IC H8 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3684FP

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

b. Buffer operation is used and TPSC2 = TPSC1 = TPSC0 = 0
c. Buffer operation is not used and other than TPSC2 = TPSC1 = TPSC0 = 0
d. Buffer operation is used and other than TPSC2 = TPSC1 = TPSC0 = 0
To change duty cycles while a waveform with a duty cycle of 0% or 100% is being
output, make sure the following procedure.
To change duty cycles while a 0%-duty cycle waveform is being output, write to GR
while H'0000 TCNT_1 < previous GR value
To change duty cycles while a 100%-duty cycle waveform is being output, write to GR
while previous GR value< TCNT_0 GRA_0
Note that changing from a 0%-duty cycle waveform to a 100%-duty cycle waveform
and vice versa is not possible.
Write H'0000 or a value equal to or more than the GRA_0 value to the buffer register.
To output a 0%-duty cycle waveform, write a value equal to or more than the GRA_0
value to the buffer register
To output a 100%-duty cycle waveform, write H'0000 to the buffer register
For details on buffer operation, see section 13.4.8, Buffer Operation.
Write a value which satisfies GRA_0 + 1 < GR < H'FFFF to GR directly at the timing
shown below.
To output a 0%-duty cycle waveform, write the value while H'0000 TCNT_1 <
previous GR value
To output a 100%-duty cycle waveform, write the value while previous GR value<
TCNT_0 GRA_0
To change duty cycles while a waveform with a duty cycle of 0% and 100% is being
output, the following procedure must be followed.
To change duty cycles while a 0%-duty cycle waveform is being output, write to GR
while H'0000 TCNT_1 < previous GR value
To change duty cycles while a 100%-duty cycle waveform is being output, write to GR
while previous GR value< TCNT_0 GRA_0
Note that changing from a 0%-duty cycle waveform to a 100%-duty cycle waveform
and vice versa is not possible.
Write a value which satisfies GRA_0 + 1 < GR < H'FFFF to the buffer register. A
waveform with a duty cycle of 0% can be output. However, a waveform with a duty
cycle of 100% cannot be output using the buffer operation. Also, the buffer operation
cannot be used to change duty cycles while a waveform with a duty cycle of 100% is
being output. For details on buffer operation, see section 13.4.8, Buffer Operation.
Rev.5.00 Nov. 02, 2005 Page 229 of 500
Section 13 Timer Z
REJ09B0027-0500