MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 18

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MC68EN360AI25VL

Manufacturer Part Number
MC68EN360AI25VL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC68EN360AI25VL

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Lead Free Status / RoHS Status
Compliant

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Table of Contents
Paragraph
Number
7.10.17.6
7.10.17.6.1 Transmit Commands............................................................................7-175
7.10.17.6.2 Receive Commands.............................................................................7-176
7.10.17.7
7.10.17.7.1 Transmission Errors.............................................................................7-176
7.10.17.7.2 Reception Errors ..................................................................................7-177
7.10.17.8
7.10.17.9
7.10.17.10
7.10.17.11
7.10.17.12
7.10.17.13
7.10.17.14
7.10.17.15
7.10.18
7.10.18.1
7.10.18.2
7.10.18.2.1 Accessing the HDLC Bus.....................................................................7-192
7.10.18.2.2 More Performance ...............................................................................7-193
7.10.18.2.3 Delayed RTS Mode..............................................................................7-194
7.10.18.2.4 Using the TSA......................................................................................7-195
7.10.18.3
7.10.18.3.1 GSMR Programming............................................................................7-196
7.10.18.3.2 PSMR Programming ............................................................................7-196
7.10.18.3.3 HDLC Bus Controller Example ............................................................7-196
7.10.19
7.10.19.1
7.10.19.2
7.10.19.3
7.10.19.4
7.10.19.4.1 GSMR Programming............................................................................7-199
7.10.19.4.2 PSMR Programming ............................................................................7-200
7.10.19.4.3 TODR Programming ............................................................................7-200
7.10.19.4.4 AppleTalk Controller Example .............................................................7-200
7.10.20
7.10.20.1
7.10.20.2
7.10.20.3
7.10.20.4
7.10.20.5
7.10.20.5.1 Transmit Commands............................................................................7-204
7.10.20.5.2 Receive Commands.............................................................................7-205
7.10.20.6
7.10.20.7
7.10.20.8
xiv
HDLC Command Set ...........................................................................7-175
HDLC Error-handling Procedure..........................................................7-176
HDLC Mode Register (PSMR) .............................................................7-178
HDLC Receive Buffer Descriptor (Rx BD) ...........................................7-179
HDLC Transmit Buffer Descriptor (Tx BD)...........................................7-183
HDLC Event Register (SCCE) .............................................................7-184
HDLC Mask Register (SCCM) .............................................................7-186
SCC Status Register (SCCS) ..............................................................7-187
SCC HDLC Example #1.......................................................................7-187
SCC HDLC Example #2.......................................................................7-189
HDLC Bus Controller ...........................................................................7-189
HDLC Bus Key Features......................................................................7-192
HDLC Bus Operation ...........................................................................7-192
HDLC Bus Memory Map and Programming ........................................7-196
AppleTalk Controller ............................................................................7-196
LocalTalk Bus Operation......................................................................7-197
Appletalk Controller Key Features .......................................................7-198
QUICC AppleTalk Hardware Connection.............................................7-198
AppleTalk Memory Map and Programming Model...............................7-198
BISYNC Controller ...............................................................................7-200
BISYNC Controller Features................................................................7-201
BISYNC Channel Frame Transmission ...............................................7-201
BISYNC Channel Frame Reception.....................................................7-202
BISYNC Memory Map..........................................................................7-203
BISYNC Command Set........................................................................7-204
BISYNC Control Character Recognition ..............................................7-206
BSYNC-BISYNC SYNC Register.........................................................7-207
BDLE-BISYNC DLE Register...............................................................7-208
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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