MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 460

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Serial Communication Controllers (SCCs)
FM0 A 1 is represented by a transition at the beginning of the bit
FM1 A 1 is represented by a transition at the beginning of the bit
ManchesterA 1 is represented by a high to low transition at the center of
Differential ManchesterA 1 is represented by a transition at the center of the bit with
7.10.12.2 DPLL OPERATION. Each SCC channel includes a DPLL used to recover clock
information from a received data stream. For applications that provide a direct clock source
to the SCC, the DPLL may be bypassed as programmed in the GSMR.
The DPLL must not be used when an SCC is programmed to Ethernet. It is optional for other
protocols.
The DPLL receive block diagram is shown in Figure 7-44; the transmit block diagram is
shown in Figure 7-45.
7-136
A 0 is represented by no transition at all.
only.
A 0 is represented by a transition at the beginning of the bit
and another transition at the center of the bit.
and another transition at the center of the bit.
A 0 is represented by a transition at the beginning of the bit
only.
the bit.
A 0 is represented by a low to high transition at the center of
the bit. In both cases there may be a transition at the beginning
of the bit to set up the level required to make the correct center
transition.
the opposite direction from the transition at the center of the
preceding bit.
A 0 is represented by a transition at the center of the bit with
the same polarity from the transition at the center of the
preceding bit.
Freescale Semiconductor, Inc.
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