MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 26

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Table of Contents
Paragraph
Number
9.3
9.3.1
9.3.2
9.3.3
9.3.4
9.3.4.1
9.3.4.1.1
9.3.4.1.2
9.3.4.2
9.3.4.2.1
9.3.4.2.2
9.3.4.2.3
9.3.4.3
9.3.4.4
9.4
9.4.1
9.4.1.1
9.4.1.2
9.4.1.3
9.4.1.4
9.4.2
9.4.2.1
9.4.2.2
9.4.2.3
9.4.2.4
9.4.2.5
9.4.2.6
xxii
Step 4: Write the MBAR.........................................................................9-14
Step 5: Verify a Dual-Port RAM Location...............................................9-14
Step 6: Is This a Power-Up Reset?........................................................9-14
Step 7: Deal with the Clock Synthesizer ................................................9-14
Step 8: Initialize System Protection .......................................................9-15
Step 9: Clear Entire Dual-Port RAM ......................................................9-15
Step 10: Write the PEPAR .....................................................................9-15
Step 11: Remap Chip Select 0...............................................................9-15
Step 12: Initialize the System RAM........................................................9-15
Step 13: Copy the EVT to System RAM ................................................9-16
Step 14: Initialize All Other Memory and Peripherals ............................9-16
Step 15: Initialize the Rest of the SIM60................................................9-16
Step 16: Generate a SIM60 Interrupt.....................................................9-16
Step 17: Test the CPM...........................................................................9-17
Step 18: Generate Interrupts with the CPM ...........................................9-17
Step 19: Enable External Interrupts .......................................................9-17
Step 20: Enable External Bus Masters ..................................................9-18
Step 21: Off to the Races.......................................................................9-18
Porting MC68302 IMP Code to the MC68360 QUICC...........................9-18
CPU and Compilers ...............................................................................9-18
Differences/Similarities ..........................................................................9-18
Notes About Porting...............................................................................9-19
How To Port MC68302 Functions..........................................................9-19
System Configuration Registers. ...........................................................9-19
Base Address Register (BAR). ..............................................................9-19
System Control Register (SCR). ............................................................9-20
System RAM. .........................................................................................9-21
Buffer Descriptors. .................................................................................9-21
Protocol-Independent Parameter RAM Values......................................9-21
Protocol-Dependent Parameter RAM Values. .......................................9-22
Internal Registers (System Integration Block)........................................9-23
Internal Registers (Communication Processor). ....................................9-26
Using the QUICC MC68040 Companion Mode .....................................9-31
MC68EC040 to QUICC Interface...........................................................9-32
MC68EC040 Reads And Writes to QUICC............................................9-32
Clocking Strategy...................................................................................9-34
Reset Strategy. ......................................................................................9-34
Interrupts................................................................................................9-34
Memory Interfaces .................................................................................9-37
QUICC Memory Interface Pins. .............................................................9-37
Regular EPROM. ...................................................................................9-38
Burst EPROM. .......................................................................................9-38
Flash EPROM. .......................................................................................9-41
Regular SRAM. ......................................................................................9-41
Burst SRAM. ..........................................................................................9-41
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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