MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 939

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

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D.2.7 Performance
The QUICC32 with the QMC protocol is designed to handle data rates from 8 kbps to 2.048
Mbps.
The QMC can support up to 32 channels.
These are the outer boundaries. The user is free to program channel routing in the QMC and
the SI RAM to create any other TDM system.
Beside the support for QMC, the remaining SCC channels in the QUICC32 can, in the 25
MHz version, support a data rate of 64 kbps each with any protocol framework. These
remaining channels can be used independently or also multiplexed through the SI RAM.
The 33 MHz version of QUICC32 can support one Ethernet channel with 32 QMC channels.
A more detailed performance table will be provided at a later date.
CHANNEL j PARAMETER
PARAMETER
RAM PAGE 1
PARAMETER
RAM PAGE 2
PARAMETER
RAM PAGE 3
PARAMETER
RAM PAGE 4
CHANNEL 0 PARAMETER
CHANNEL 1 PARAMETER
Freescale Semiconductor, Inc.
For More Information On This Product,
MCBASE
TBASE
RBASE
Figure D-6. FQMC Memory Map
DPR
MC68360 USER’S MANUAL
Go to: www.freescale.com
MEMORY STRUCTURE FOR MULTICHANNEL CONTROLLER
EXTERNAL MEMORY
CHANNEL j Tx BD
CHANNEL j Rx BD
TABLE
TABLE
MC68MH360 Product Brief
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