MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 467

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

By appropriately setting the GSMR, any of the SCC channels may be configured to function
as a UART.
The UART provides standard serial I/O using asynchronous character-oriented (start-stop)
protocols with RS-232C-type lines. The UART may be used to communicate with any exist-
ing RS-232-type device.
The UART provides a port for serial communication to other microprocessors, terminals,
etc., either locally or via modems. It includes facilities for communication using standard
asynchronous bit rates and protocols. The UART supports a multidrop mode for master/
slave operation with wake-up capability on both idle line and address bit. The UART also
supports a synchronous mode of operation where a clock must be provided with each bit
received.
The UART transmits data from memory (either internal or external) to the TXD line and
receives data from the RXD line into memory. In a synchronous UART mode, the clock must
also be supplied. It may be generated internally or externally. Modem lines are supported
via the port C pins.
The UART consists of separate transmit and receive sections whose operations are asyn-
chronous with the CPU32+ core.
7.10.16.1 UART KEY FEATURES. •The UART contains the following key features:
7.10.16.2 NORMAL ASYNCHRONOUS MODE. •In a normal asynchronous mode, the re-
• Flexible Message-Oriented Data Structure
• Implements Synchronous and Asynchronous UART
• Multidrop Operation
• Receiver Wake-Up on Idle Line or Address Mode
• Eight Control Character Comparison
• Two Address Comparison
• Maintenance of Four 16-Bit Error Counters
• Received Break Character Length Indication
• Programmable Data Length (5–8 Bits)
• Programmable 1 to 2 Stop Bits in Transmission
• Capable of Reception without a Stop Bit
• Programmable Fractional Stop Bit Length
• Even/Odd/Force/No Parity Generation
• Even/Odd/Force/No Parity Check
• Frame Error, Noise Error, Break, and idle Detection
• Transmit Preamble and Break Sequences
• Freeze Transmission Option with Low-Latency Stop
ceive shift register receives the incoming data on the RXDx pin. The length and format
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Serial Communication Controllers (SCCs)