MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 402

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Serial Interface with Time Slot Assigner
ENb—Enable Channel b
ENa—Enable Channel a
RDM1–RDM0—RAM Division Mode
7.8.5.2 SI MODE REGISTER (SIMODE). The 32-bit SIMODE defines the SI operation
modes. This register allows the user (in conjunction with the SI RAM) to support any or all
of the ISDN channels independently when in IDL or GCI (IOM-2) mode. Any extra SCC
channel can then be used for other purposes in NMSI mode. SIMODE appears to the user
as a memory-mapped, read-write register and is cleared at reset.
SMCx—SMCx Connection
7-78
SMC2
SMC1
31
15
These bits define the RAM division mode and the number of multiplexed channels sup-
ported in the SI.
0 = Channel b is disabled. The SI RAMs and TDM routing are in a state of reset, but
1 = The SI is enabled.
0 = Channel a is disabled. The SI RAMs and TDM routing are in a state of reset, but
1 = The SI is enabled.
00 = The SI supports one TDM channel with 64 entries for receive routing and 64 en-
01 = The SI supports one TDM channel with 32 entries for receive routing and 32 en-
10 = The SI supports two TDM channels with 32 entries for the receive routing and 32
11 = The SI supports two TDM channels with 16 entries for receive routing and 16 en-
0 = NMSI mode. The clock source is determined by the SMCxCS bit, and the data
1 = SMCx is connected to the multiplexed SI (TDM channel).
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all other SI functions still operate.
all other SI functions still operate.
comes from a dedicated pin (SMTXD1 and SMRXD1 for SMC1 or SMTXD2 and
SMRXD2 for SMC2) in the NMSI.
tries for transmit routing.
tries for transmit routing. There are an additional 32 shadow entries for the receive
routing and 32 shadow entries for transmit routing that may be used to dynami-
cally change the routing.
entries for transmit routing for each of the two TDMs.
tries for transmit routing for each channel. There are an additional 16 shadow en-
tries for receive routing and 16 shadow entries for transmit routing that may be
used to dynamically change the channel routing.
SMC2CS
SMC1CS
29
13
TSAa must be used in RDM1—0 if 00 or 01 setting is desired.
28
12
27
11
Freescale Semiconductor, Inc.
SDMb
SDMa
For More Information On This Product,
26
10
MC68360 USER’S MANUAL
Go to: www.freescale.com
25
9
RFSDb
RFSDa
24
NOTE
8
DSCb
DSCa
23
7
CRTb
CRTa
22
6
STZb
STZa
21
5
CEb
CEa
20
4
FEb
FEa
19
3
GMb
GMa
18
2
17
1
TFSDb
TFSDa
16
0