PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 115
PNX1501E
Manufacturer Part Number
PNX1501E
Description
Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1501E.pdf
(819 pages)
Specifications of PNX1501E
Product
DSPs
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-795
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
Details
Other names
PNX1501E,557
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Philips Semiconductors
Volume 1 of 1
Table 5: Interrupt Source Assignments
12NC 9397 750 14321
Product data sheet
SOURCE NAME
TIMER3
SYSTIMER
VIP
QVCP
AI
AO
SPDI
SPDO
ETHERNET
I2C
TMDBG
FGPI
FGPO
Reserved
MBS
DE
VLD
DVD-CSS
GPIO[10]
GPIO[11]
HOSTCOM
APPLICATION
DEBUGGER
RTOS
GPIO_INT0
GPIO_INT1
GPIO_INT2
GPIO_INT3
GPIO_INT4
PCI
PCI_GPPM
PCI_GPXIO
PCI_DMA
CLOCK
WATCHDOG
Reserved
SOURCE
NUMBER
7
8
9
10
11
12
13
14
15
16
17
18
19
20...21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43...59
INTERRUPT
OPERATING MODE
edge
edge
level
level
level
level
level
level
level
level
level
level
level
n/a
level
level
level
level
level
level
edge
edge
edge
edge
level
level
level
level
level
level
level
level
level
level
level
n/a
Rev. 2 — 1 December 2004
SOURCE DESCRIPTION
General purpose internal TM3260 timer.
General purpose internal TM3260 timer.
Video Input Processor
Quality Video Composition Processor
Audio Input
Audio Output
S/PDIF Input
S/PDIF Output
Ethernet MAC 10/100
I
JTAG interface
Fast Generic Parallel Input interface
Fast Generic Parallel Output interface
Reserved for future devices
Memory Base Scaler
2D Drawing Engine
Variable Length Decoder
DVD Descrambler
Direct external interrupt input line, active HIGH
Direct external interrupt input line, active HIGH
(software) Host Communication
(software) Application
(software) Debugger
(software) Real Time Operating System
General Purpose I/O interrupt line 0, FIFO 0
General Purpose I/O interrupt line 1, FIFO 1
General Purpose I/O interrupt line 2, FIFO 2
General Purpose I/O interrupt line 3, FIFO 3
General Purpose I/O interrupt line 4, TSU Units
Peripheral Component Interconnect error monitoring
PCI single data phase transfer completed
PCI XIO transaction completed
PCI DMA transaction completed
Clock generation
On-chip Watchdog timer
Reserved for future devices
2
C interface
Chapter 3: System On Chip Resources
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
3-13
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