PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 486
PNX1501E
Manufacturer Part Number
PNX1501E
Description
Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1501E.pdf
(819 pages)
Specifications of PNX1501E
Product
DSPs
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-795
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
Details
Other names
PNX1501E,557
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Product data sheet
2.10 Variable Length
2.11 Double Buffer Operation
NOTE: The length of the timestamp word is NOT INCLUDED in the FGPI_REC_SIZE
value but MUST be included in the FGPI_STRIDE value.
If both FGPI_CTL.TSTAMP_SELECT and FGPI_CTL.VAR_LENGTH bits are set,
then the timestamp word is written to memory before the length word.
If enabled, by setting FGPI_CTL.VAR_LENGTH bit to ‘1’, a 4-byte length of record or
message (number of samples received) word is written to main memory before
sample data but after the timestamp word (if enabled).
Remark: The length of the VAR_LENGTH word is NOT INCLUDED in the
FGPI_REC_SIZE value but MUST be included in the FGPI_STRIDE value.
Figure 4
discussion a buffer start event means either the current buffer is full or that an
external buffer sync event tells the FGPI to terminate the current buffer and switch to
the next buffer. The exact semantics depends on the operating mode of the FGPI.
Upon a system reset, all status and control bits are placed in the reset condition and
no buffer is active. Once software has programmed the required parameters, it is safe
to enable capture by setting CAPTURE_ENABLE_1 and CAPTURE_ENABLE_2.
Buffer 1 will become the first active buffer. Starting with the next record or message
start event samples will be captured in buffer 1 until either capture is disabled or
buffer 1 is terminated by a buffer start event. Refer to
the FGPI handles buffer termination and switching during a transfer.
When a buffer fills, or is stopped by a buffer start event, the last data sample is tagged
by the FGPI so the memory controller will inform the FGPI when the buffer is written
to main memory. When the tag is acknowledged the FGPI will issue a BUF1FULL
interrupt (if enabled). During this time buffer 2 will be capturing data samples.
presents the major states associated with double buffering. In the following
Rev. 2 — 1 December 2004
Chapter 14: FGPI: Fast General Purpose Interface
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
Figure 5 on page 14-12
PNX15xx Series
for how
14-10
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