PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 401

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
12NC 9397 750 14321
Product data sheet
Bit
27:0
Offset 0x10 E210
31:23
22:0
Offset 0x10 E214
31:8
7:0
Offset 0x10 E218
31:28
27:0
Offset 0x10 E21C
31:28
27:0
Offset 0x10 E220
31:16
15:0
Offset 0x10 E224
31:16
15:0
Offset 0x10 E228
Symbol
Layer N Source Address
B
Unused
Layer N Pitch B
Unused
DCnt
Unused
Layer Source Address A
Semi Planar UV
Unused
Layer Source Address B
Semi Planar UV
Unused
Line Increment Packed
Unused
Line Increment Semi
Planar
Layer Source Pitch B (Packed/Semi Planar Y)
Dummy Pixel Count
Layer Source Address A (Semi Planar UV)
Layer Source Address B (Semi Planar UV)
Line Increment (Packed)
Line Increment (Semi Planar)
Layer Source Pitch (Semi Planar UV)
…Continued
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
-
0
-
0
-
0
-
0
-
0xFFFFh This register determines whether a layer line is repeatedly fetched
-
0xFFFFh This register determines whether a layer line is repeatedly fetched
Value
Rev. 2 — 1 December 2004
Description
Layer N Source Data Start Address B in bytes. This sets starting
address B for data transfers from the linear Frame Buffer memory to
Layer N. For semi planar and planar modes this address points to
the Y plane.
Note: It should be aligned on a 128-byte boundary. It has to be
8-byte aligned.
Layer N Source Data Pitch B in bytes sets pitch B for data transfers
from the linear Frame Buffer memory to Layer N. For semi planar
and planar modes this determines the pitch for the Y plane.
The value has to be rounded up to the next 64-bit word.
Number of dummy pixels to be inserted between layer video lines
Layer N Source Data Start Address A in bytes. This sets starting
address A for data transfers from the linear Frame Buffer memory to
Layer N. This Register holds the source address for the UV plane in
semi planar modes.
Note: It should be aligned on a 128-byte boundary. It has to be
8-byte aligned.
Layer N Source Data Start Address B in bytes. This sets starting
address B for data transfers from the linear Frame Buffer memory to
Layer N. This Register holds the source address for the UV plane in
semi planar modes.
Note: It should be aligned on a 128-byte boundary. It has to be
8-byte aligned.
from memory or not.
Round Down(2
line is fetched i.e., 0x8000H would fetch each line exactly twice (line
doubling).
from memory or not.
Round Down(2
same line is fetched i.e., 0x8000H would fetch each line exactly
twice (line doubling).
16
16
/(Line Increment Packed))= #of times the same
/(Line Increment Semi Planar))= #of times the
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
Chapter 11: QVCP
11-55